[PATCH v2 1/5] dt-bindings: riscv: starfive: add xunlong,orangepi-rv

[E Shattow]

From: Icenowy Zheng <uwu at icenowy.me>

Add "xunlong,orangepi-rv" as a StarFive JH7110 SoC-based board.

Signed-off-by: Icenowy Zheng <uwu at icenowy.me>
Signed-off-by: E Shattow <e at freeshell.de>
Acked-by: Conor Dooley <conor.dooley at microchip.com>
Acked-by: Rob Herring (Arm) <robh at kernel.org>
Signed-off-by: Conor Dooley <conor.dooley at microchip.com>

[ upstream commit: d94ebab404b0ce6498770888e25102e32b2b13da ]

(cherry picked from commit 19644ea3243c8749d1c08d4397b4522965a9bf8e)
---
 dts/upstream/Bindings/riscv/starfive.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dts/upstream/Bindings/riscv/starfive.yaml b/dts/upstream/Bindings/riscv/starfive.yaml
index 04510341a71..3fdeab9d8f0 100644
--- a/dts/upstream/Bindings/riscv/starfive.yaml
+++ b/dts/upstream/Bindings/riscv/starfive.yaml
@@ -33,6 +33,7 @@ properties:
               - pine64,star64
               - starfive,visionfive-2-v1.2a
               - starfive,visionfive-2-v1.3b
+              - xunlong,orangepi-rv
           - const: starfive,jh7110
 
 additionalProperties: true
-- 
2.50.0