[PATCH v2 1/2] clk: renesas: Do not enable MSTP4 extra modules on R8A77995 D3

[Niklas Söderlund]

Since commit a2bd99549c61 ("clk: renesas: Tear clock controller down
last before booting OS") enabling the module gated by bit 8 in MSTP4
prevents Linux from booting. The bits 8 and 7 of MSTP4 where only
documented in early versions of the datasheet and have since been
removed.

To allow Linux to boot update the MSTP4 enable value to reflect the
hardware default, 0x80.

Suggested-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas at ragnatech.se>
---
* Changes since v1
- Keep the hardware default value instead of writing zero to the
  register.
---
 drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index f49faa47cb37..309b0aec8e2a 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -220,7 +220,7 @@ static const struct mstp_stop_table r8a77995_mstp_table[] = {
 	{ 0x03e01000, 0x0, 0x03e01000, 0 },
 	{ 0x000e2fdc, 0x2000, 0x000e2fd8, 0 },
 	{ 0xc00014df, 0x400, 0xc00014df, 0 },
-	{ 0x80000004, 0x180, 0x80000004, 0 },
+	{ 0x80000004, 0x80, 0x80000004, 0 },
 	{ 0x40d20004, 0x0, 0x40d20004, 0 },
 	{ 0x08c0008c, 0x0, 0x08c0008c, 0 },
 	{ 0x09941c18, 0x0, 0x09941c18, 0 },
-- 
2.52.0