[PATCH v2 00/26] SoCFPGA: Add Boot Support for Agilex 5 in U-Boot

[alif.zakuan.yuslaimi at intel.com]

From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at intel.com>

This patch set introduces boot support for the Altera SoCFPGA Agilex 5 platform in U-Boot. The changes include:
	1. Board-specific configurations and setup required to enable Agilex 5
	   operation in U-Boot.
	2. Integration of cache coherency unit (CCU) initialization routine,
	   including CCU conguration in DT.
	3. Clock, firewall (configured in DT), SMMU, low level initialization
	   specific to Agilex 5.
	4. Integration of memory initialization routine, including DDR setup.

This patch set has been tested on Agilex 5 devkit with QSPI boot (UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).

History:
--------
[v1]: https://patchwork.ozlabs.org/project/uboot/cover/20240920070242.20884-1-tien.fong.chee@intel.com/

v1->v2:
--------
Patch 1
- Converted system manager base address probing from header file to DT

Patch 2
- Updated Agilex5 clock driver to probe base address from DT

Patch 3
- Use common ARMv8 linker script instead of SoC64 linker script

Patch 4
- Use common ARMv8 low level script instead of new Agilex5 low level script

Patch 8
- Add Linux lore link for XGMAC enablement in Agilex5 Linux DT

Patch 9
- Use common PSCI reset driver instead of new Agilex5 reset driver

Patch 12
- Simplify printout logic writing format

Patch 13
- Use env_set_ulong() instead of env_set

Patch 15
- Cast as uintptr_t instead of u64

Alif Zakuan Yuslaimi (14):
  arm: socfpga: misc: Exclude Agilex5 from clock manager base address
    retrieval
  drivers: clk: agilex5: Configure intosc as boot_clk source
  drivers: clk: agilex5: Replace status polling with wait_for_bit_le32()
  drivers: clk: agilex5: Set PLL to asynchronous mode
  arm: socfpga: agilex5: Add warm reset mask for Agilex5
  arm: socfpga: Disable GIC for Agilex5
  arch: arm: Enable PSCI reset driver for Agilex5
  firmware: psci: Flush cache before warm reset
  arm: socfpga: agilex5: Update CPU info
  arm: socfpga: Export board ID as U-Boot environment
  arm: socfpga: smc: Add memory coherency support to mailbox command
  arm: armv8: Improve SPL data save and restore implementation
  configs: socfpga: soc64: agilex5: Use common ARMv8 linker script
  configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS

Tien Fong Chee (11):
  arm: socfpga: agilex5: Add new system manager base addresses
  arm: socfpga: Add handoff data support for SoCFPGA Agilex5 device
  arm: dts: agilex5: Add HPS cache coherency unit configuration settings
  arm: dts: agilex5: Add firewall configure settings
  arm: dts: agilex5: Enable XGMAC
  arm: socfpga: agilex5: Enable cache flush for system memory cache in
    CCU
  arm: socfpga: agilex5: Add SMMU initialization
  configs: agilex5: Add configuration for malloc pool
  arm: socfpga: agilex5: Add SPL for Agilex5 SoCFPGA
  configs: socfpga: soc64: agilex5: Enable XGMAC
  arm: socfpga: soc64: Add support for board_boot_order()

Tingting Meng (1):
  ddr: altera: Add DDR driver for Agilex5 series

 MAINTAINERS                                   |   2 +
 arch/arm/Kconfig                              |   2 +-
 arch/arm/cpu/armv8/spl_data.c                 |  13 +-
 arch/arm/cpu/armv8/u-boot-spl.lds             |   1 +
 arch/arm/dts/socfpga_agilex5-u-boot.dtsi      | 661 ++++++++++++++++
 arch/arm/dts/socfpga_agilex5.dtsi             |   8 +
 .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi |  71 +-
 arch/arm/mach-socfpga/Kconfig                 |   5 +-
 arch/arm/mach-socfpga/Makefile                |   8 +-
 arch/arm/mach-socfpga/altera-sysmgr.c         | 113 +++
 arch/arm/mach-socfpga/board.c                 |  32 +-
 arch/arm/mach-socfpga/ccu_ncore3.c            |  64 ++
 .../mach-socfpga/include/mach/altera-sysmgr.h |  16 +
 arch/arm/mach-socfpga/include/mach/board.h    |  11 +
 arch/arm/mach-socfpga/include/mach/firewall.h |  21 +-
 .../mach-socfpga/include/mach/handoff_soc64.h |   5 +-
 arch/arm/mach-socfpga/include/mach/misc.h     |   2 +
 .../include/mach/reset_manager_soc64.h        |   9 +-
 .../include/mach/system_manager_soc64.h       | 128 +--
 arch/arm/mach-socfpga/misc.c                  |  70 +-
 arch/arm/mach-socfpga/misc_soc64.c            |  32 +-
 arch/arm/mach-socfpga/smc_api.c               |  12 +-
 arch/arm/mach-socfpga/spl_agilex5.c           | 110 +++
 arch/arm/mach-socfpga/spl_soc64.c             | 119 +++
 arch/arm/mach-socfpga/wrap_handoff_soc64.c    |   9 +-
 board/intel/agilex5-socdk/Makefile            |   7 +
 board/intel/agilex5-socdk/socfpga.c           |  12 +
 configs/socfpga_agilex5_defconfig             |  17 +-
 drivers/clk/altera/clk-agilex5.c              |  53 +-
 drivers/ddr/altera/Makefile                   |   3 +-
 drivers/ddr/altera/iossm_mailbox.c            | 748 ++++++++++++++++++
 drivers/ddr/altera/iossm_mailbox.h            | 136 ++++
 drivers/ddr/altera/sdram_agilex5.c            | 420 ++++++++++
 drivers/ddr/altera/sdram_soc64.c              |  76 +-
 drivers/ddr/altera/sdram_soc64.h              |  10 +
 drivers/firmware/psci.c                       |   1 +
 include/configs/socfpga_soc64_common.h        |   6 +
 37 files changed, 2879 insertions(+), 134 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/altera-sysmgr.c
 create mode 100644 arch/arm/mach-socfpga/ccu_ncore3.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/altera-sysmgr.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/board.h
 create mode 100644 arch/arm/mach-socfpga/spl_agilex5.c
 create mode 100644 board/intel/agilex5-socdk/Makefile
 create mode 100644 board/intel/agilex5-socdk/socfpga.c
 create mode 100644 drivers/ddr/altera/iossm_mailbox.c
 create mode 100644 drivers/ddr/altera/iossm_mailbox.h
 create mode 100644 drivers/ddr/altera/sdram_agilex5.c

-- 
2.25.1