[PATCH v2 1/1] arm: socfpga:agilex5: Fix system manager watchdog mode setting

[Chee, Tien Fong]

> -----Original Message-----
> From: muhammad.hazim.izzat.zamri at intel.com
> <muhammad.hazim.izzat.zamri at intel.com>
> Sent: Monday, January 13, 2025 10:08 AM
> To: Tien Fong <tien.fong.chee at intel.com>
> Cc: Marek <marex at denx.de>; Simon <simon.k.r.goldschmidt at gmail.com>;
> Tom Rini <trini at konsulko.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tingting Meng <tingting.meng at intel.com>;
> Meng, Tingting <tingting.meng at altera.com>; Yuslaimi, Alif Zakuan
> <alif.zakuan.yuslaimi at altera.com>; Zamri, Muhammad Hazim Izzat
> <muhammad.hazim.izzat.zamri at altera.com>; u-boot at lists.denx.de;
> Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri at intel.com>
> Subject: [PATCH v2 1/1] arm: socfpga:agilex5: Fix system manager watchdog
> mode setting
> 
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> 
> From: Muhammad Hazim Izzat Zamri
> <muhammad.hazim.izzat.zamri at intel.com>
> 
> This commit is to fix the system manager watchdog mode setting to support
> until mode_4 for Agilex5. This changes can refer to system manager register
> map on wddbg fields.
> 
> In Agilex7 it is not detected as an issue because Agilex7 only have 4 watchdog
> until mode_3 and it is already been set correctly for it to halt on any CPU in
> debug mode. However, in Agilex5 this fix is needed in order to enable the
> watchdog pause feature for mode_4 when entering debug mode. If 0xF is
> not been set on mode_4, the Watchdog Timers will not halt on any CPU. As
> by default value, the pause signal does not assert when any CPU is in debug
> mode and the watchdog continue to count.
> 
> Signed-off-by: Muhammad Hazim Izzat Zamri
> <muhammad.hazim.izzat.zamri at intel.com>
> ---
>  arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> index b1ef4a70641..670aa3cc07e 100644
> --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
> @@ -182,7 +182,7 @@ void populate_sysmgr_pinmux(void);
> 
>  #define SYSMGR_DMAPERIPH_ALL_NS                0xFFFFFFFF
> 
> -#define SYSMGR_WDDBG_PAUSE_ALL_CPU     0x0F0F0F0F
> +#define SYSMGR_WDDBG_PAUSE_ALL_CPU     0xFF0F0F0F
> 
>  #if IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
>  #define        SYSMGR_SOC64_DDR_MODE_MSK       BIT(0)
> --
> 2.26.2

Reviewed-by: Tien Fong Chee <tien.fong.chee at intel.com>

Regards,
Tien Fong