[PATCH 1/8] sunxi: clock: improve grouping of default clock register values

[Andre Przywara]

With each new SoC added to the clock_sun50i_h6.h header file, we add a
list of default values for the bus clock registers. This list gets a bit
hard to read, as the spacing between the lines looks confusing.

Tighten the lines by removing empty lines, to make it more obvious which
values belong together. Also remove those comments that were more or
less duplicating the next code line, and didn't add any information.

This makes it easier to find existing values and to add support for new
SoCs.

Signed-off-by: Andre Przywara <andre.przywara at arm.com>
---
 .../include/asm/arch-sunxi/clock_sun50i_h6.h   | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
index a84a57e5b41..76dd33c9477 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
@@ -267,31 +267,23 @@ struct sunxi_ccm_reg {
 #define CCM_CPU_AXI_DEFAULT_FACTORS	0x301
 
 #ifdef CONFIG_MACH_SUN50I_H6				/* H6 */
-#define CCM_PLL6_DEFAULT		0xa0006300
 
-/* psi_ahb1_ahb2 bit field */
+#define CCM_PLL6_DEFAULT		0xa0006300
 #define CCM_PSI_AHB1_AHB2_DEFAULT	0x03000102
-
-/* ahb3 bit field */
 #define CCM_AHB3_DEFAULT		0x03000002
-
-/* apb1 bit field */
 #define CCM_APB1_DEFAULT		0x03000102
+
 #elif CONFIG_MACH_SUN50I_H616				/* H616 */
-#define CCM_PLL6_DEFAULT		0xa8003100
 
-/* psi_ahb1_ahb2 bit field */
+#define CCM_PLL6_DEFAULT		0xa8003100
 #define CCM_PSI_AHB1_AHB2_DEFAULT	0x03000002
-
-/* ahb3 bit field */
 #define CCM_AHB3_DEFAULT		0x03000002
-
-/* apb1 bit field */
 #define CCM_APB1_DEFAULT		0x03000102
+
 #elif CONFIG_MACH_SUN8I_R528				/* R528 */
+
 #define CCM_PLL6_DEFAULT		0xe8216300
 #define CCM_PSI_AHB1_AHB2_DEFAULT	0x03000002
-//#define CCM_AHB3_DEFAULT		0x03000002
 #define CCM_APB1_DEFAULT		0x03000102
 #endif
 
-- 
2.46.2