[PATCH v4 01/20] mailbox: add i.MX95 Messaging Unit (MU) driver

[Marek Vasut]

On 1/15/25 2:28 PM, Alice Guo wrote:

 > This id ported from Linux (v6.12.8) driver
 > drivers/mailbox/imx-mailbox.c.

'id' -> 'is' typo .

It is better to include the commit SHA from which this was ported over 
too, so the follow up patches in Linux can be easily ported over as they 
appear. If the last commit SHA from which this was ported over is known, 
then it is possible to do e.g. the following to find out any new commits:

linux$ git log 39d7d6177f0c..origin/master -- drivers/mailbox/imx-mailbox.c

"$ git log v6.12.8 -- drivers/mailbox/imx-mailbox.c" indicates this is 
the latest imx-mailbox.c commit in Linux 6.12.8:

39d7d6177f0c ("mailbox: imx: use device name in interrupt name")

[...]

> +#define IMX_MU_xSR_GIPn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x))))
> +#define IMX_MU_xSR_RFn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
> +#define IMX_MU_xSR_TEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x))))
> +
> +/* General Purpose Interrupt Enable */
> +#define IMX_MU_xCR_GIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x))))
> +/* Receive Interrupt Enable */
> +#define IMX_MU_xCR_RIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
> +/* Transmit Interrupt Enable */
> +#define IMX_MU_xCR_TIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x))))
> +/* General Purpose Interrupt Request */
> +#define IMX_MU_xCR_GIRn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(16 + (3 - (x))))
> +/* MU reset */
> +#define IMX_MU_xCR_RST(type)	(type & IMX_MU_V2 ? BIT(0) : BIT(5))
> +#define IMX_MU_xSR_RST(type)	(type & IMX_MU_V2 ? BIT(0) : BIT(7))

[...]

> +static const struct imx_mu_dcfg imx_mu_cfg_imx95 = {
> +	.tx	= imx_mu_generic_tx,
> +	.rxdb	= imx_mu_generic_rxdb,
> +	.init	= imx_mu_init_generic,
> +	.of_xlate = imx_mu_generic_of_xlate,
> +	.type	= IMX_MU_V2,
> +	.xTR	= 0x200,
> +	.xRR	= 0x280,
> +	.xSR	= {0xC, 0x118, 0x124, 0x12C},
> +	.xCR	= {0x8, 0x110, 0x114, 0x120, 0x128},
> +};
[...]

I would suggest these changes:

- Add the remaining SoC support, the plumbing is already there, all the
   conditional bits are already there for MU v1/v2 , so fill in the data
   for at least the V1 MU SoCs.

- Split this patch into separate submission or series, so it can get
   reviewed separately and land faster, possibly before the MX95 support
   gets fully sorted out.