[PATCH v4 12/20] imx9: scmi: add i.MX95 SoC and clock related code

[Marek Vasut]

On 1/15/25 2:28 PM, Alice Guo wrote:

> +void init_uart_clk(u32 index)
> +{
> +	u32 clock_id;
> +
> +	switch (index) {
> +	case 0:
> +		clock_id = IMX95_CLK_LPUART1;
> +		break;
> +	case 1:
> +		clock_id = IMX95_CLK_LPUART2;
> +		break;
> +	case 2:
> +		clock_id = IMX95_CLK_LPUART3;
> +		break;
> +	default:
> +		return;
> +	}
> +
> +	/* 24MHz */
> +	imx_clk_scmi_enable(clock_id, false);
> +	imx_clk_scmi_set_parent(clock_id, IMX95_CLK_24M);
> +	imx_clk_scmi_set_rate(clock_id, 24000000);
> +	imx_clk_scmi_enable(clock_id, true);
> +}

Is this ad-hoc clock management necessary even with DM_CLK ?

> +unsigned int mxc_get_clock(enum mxc_clock clk)
> +{
> +	switch (clk) {
> +	case MXC_ARM_CLK:
> +		return get_arm_core_clk();
> +	case MXC_IPG_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_BUSWAKEUP);
> +	case MXC_CSPI_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_LPSPI1);
> +	case MXC_ESDHC_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC1);
> +	case MXC_ESDHC2_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC2);
> +	case MXC_ESDHC3_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_USDHC3);
> +	case MXC_UART_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_LPUART1);
> +	case MXC_FLEXSPI_CLK:
> +		return imx_clk_scmi_get_rate(IMX95_CLK_FLEXSPI1);
> +	default:
> +		return -1;
> +	};
> +
> +	return -1;
> +};

Is this ad-hoc clock management necessary even with DM_CLK ?

> diff --git a/arch/arm/mach-imx/imx9/scmi/clock_scmi.c b/arch/arm/mach-imx/imx9/scmi/clock_scmi.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..23ffe0eed695b67977d441f7ee8830af9c4aabfe
> --- /dev/null
> +++ b/arch/arm/mach-imx/imx9/scmi/clock_scmi.c
> @@ -0,0 +1,135 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2025 NXP
> + *
> + * Peng Fan <peng.fan at nxp.com>
> + */
> +
> +#include <dm/uclass.h>
> +#include <scmi_agent.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int imx_clk_scmi_enable(u32 clock_id, bool enable)

Is this ad-hoc clock management necessary even with DM_CLK ?

[...]

> +int print_cpuinfo(void)
> +{
> +	u32 cpurev, max_freq;
> +	int minc, maxc;
> +
> +	cpurev = get_cpu_rev();
> +
> +	printf("CPU:   i.MX%s rev%d.%d",
> +		get_imx_type((cpurev & 0x1FF000) >> 12),
> +		(cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0);
> +
> +	max_freq = get_cpu_speed_grade_hz();
> +	if (!max_freq || max_freq == mxc_get_clock(MXC_ARM_CLK)) {
> +		printf(" at %dMHz\n", mxc_get_clock(MXC_ARM_CLK) / 1000000);
> +	} else {
> +		printf(" %d MHz (running at %d MHz)\n", max_freq / 1000000,
> +		       mxc_get_clock(MXC_ARM_CLK) / 1000000);
> +	}
> +
> +	puts("CPU:   ");
> +	switch (get_cpu_temp_grade(&minc, &maxc)) {
> +	case TEMP_AUTOMOTIVE:
> +		puts("Automotive temperature grade ");
> +		break;
> +	case TEMP_INDUSTRIAL:
> +		puts("Industrial temperature grade ");
> +		break;
> +	case TEMP_EXTCOMMERCIAL:
> +		if (is_imx93())
> +			puts("Extended Industrial temperature grade ");
> +		else
> +			puts("Extended Consumer temperature grade ");
> +		break;
> +	default:
> +		puts("Consumer temperature grade ");
> +		break;
> +	}
> +	printf("(%dC to %dC)", minc, maxc);
> +
> +#if defined(CONFIG_DM_THERMAL)

Use "if (CONFIG_IS_ENABLED(...))" instead of preprocessor "#if ..." 
where possible so compiler can detect bitrot.

[...]

> +int arch_misc_init(void)
> +{
> +	build_info();
> +	return 0;
> +}
> +
> +#ifdef CONFIG_OF_BOARD_FIXUP
> +#ifndef CONFIG_SPL_BUILD

Can this ifdeffery be cleaned up ?

> +int board_fix_fdt(void *fdt)
> +{
> +	return 0;
> +}
> +#endif
> +#endif
> +
> +int ft_system_setup(void *blob, struct bd_info *bd)
> +{
> +	return 0;
> +}
> +
> +#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)

Use if (CONFIG_IS_ENABLED()) or if (IS_ENABLED()) and please fix globally.