[PATCH 04/10] ARM: stm32: Add STM32MP13xx PMIC initialization for DDR3 DRAM type
Patrick DELAUNAY
patrick.delaunay at foss.st.com
Tue Jun 3 16:00:59 CEST 2025
Hi,
On 5/12/25 19:21, Marek Vasut wrote:
> The STM32MP13xx PMIC initialization for DDR3 DRAM type is similar
> to the STM32MP15xx PMIC initialization, except the VTT rail is not
> enabled. Fill in the STM32MP13xx support.
>
> Signed-off-by: Marek Vasut <marek.vasut at mailbox.org>
> ---
> Cc: Cheick Traore <cheick.traore at foss.st.com>
> Cc: Fabrice Gasnier <fabrice.gasnier at foss.st.com>
> Cc: Gatien Chevallier <gatien.chevallier at foss.st.com>
> Cc: Lionel Debieve <lionel.debieve at foss.st.com>
> Cc: Pascal Zimmermann <pzimmermann at dh-electronics.com>
> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
> Cc: Simon Glass <sjg at chromium.org>
> Cc: Sughosh Ganu <sughosh.ganu at linaro.org>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: u-boot at dh-electronics.com
> Cc: u-boot at lists.denx.de
> Cc: uboot-stm32 at st-md-mailman.stormreply.com
> ---
> board/st/common/stpmic1.c | 51 ++++++++++++++++++++++++++-------------
> 1 file changed, 34 insertions(+), 17 deletions(-)
>
> diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
> index 45c2bb5bcea..b46f89dacb9 100644
> --- a/board/st/common/stpmic1.c
> +++ b/board/st/common/stpmic1.c
> @@ -14,8 +14,19 @@
> #include <power/pmic.h>
> #include <power/stpmic1.h>
>
> +static bool is_stm32mp13xx(void)
> +{
> + if (!IS_ENABLED(CONFIG_STM32MP13X))
> + return false;
> +
> + return of_machine_is_compatible("st,stm32mp131") ||
> + of_machine_is_compatible("st,stm32mp133") ||
> + of_machine_is_compatible("st,stm32mp135");
return true; ?
no need to check compatible if U-Boot is compiled for STM32MP13x..
> +}
> +
> int board_ddr_power_init(enum ddr_type ddr_type)
> {
> + bool is_mp13 = is_stm32mp13xx();
> struct udevice *dev;
> bool buck3_at_1800000v = false;
> int ret;
> @@ -30,18 +41,21 @@ int board_ddr_power_init(enum ddr_type ddr_type)
> switch (ddr_type) {
> case STM32MP_DDR3:
> /* VTT = Set LDO3 to sync mode */
> - ret = pmic_reg_read(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3));
> - if (ret < 0)
> - return ret;
> -
> - ret &= ~STPMIC1_LDO3_MODE;
> - ret &= ~STPMIC1_LDO12356_VOUT_MASK;
> - ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL);
> -
> - ret = pmic_reg_write(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
> - ret);
> - if (ret < 0)
> - return ret;
> + if (!is_mp13) {
> + /* Enable VTT only on STM32MP15xx */
> + ret = pmic_reg_read(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3));
> + if (ret < 0)
> + return ret;
> +
> + ret &= ~STPMIC1_LDO3_MODE;
> + ret &= ~STPMIC1_LDO12356_VOUT_MASK;
> + ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL);
> +
> + ret = pmic_reg_write(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
> + ret);
> + if (ret < 0)
> + return ret;
> + }
>
> /* VDD_DDR = Set BUCK2 to 1.35V */
> ret = pmic_clrsetbits(dev,
> @@ -69,11 +83,14 @@ int board_ddr_power_init(enum ddr_type ddr_type)
> mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
>
> /* Enable VTT = LDO3 */
> - ret = pmic_clrsetbits(dev,
> - STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
> - STPMIC1_LDO_ENA, STPMIC1_LDO_ENA);
> - if (ret < 0)
> - return ret;
> + if (!is_mp13) {
> + /* Enable VTT only on STM32MP15xx */
> + ret = pmic_clrsetbits(dev,
> + STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
> + STPMIC1_LDO_ENA, STPMIC1_LDO_ENA);
> + if (ret < 0)
> + return ret;
> + }
>
> mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
Support of VTT is not linked to SoC but to board design...
I think all this part should be reworked / based on TF-A binding to have
information in device tree (link between regulators and DDR supply)
in TF-A we manage this part as a generic way to prepare STPMIC1L
introduction,
based on information found on device tree when we introduce STM32MP13
and STM32MP25 in TF-A
see binding for compatible = "st,stm32mp1-ddr";
docs/devicetree/bindings/memory-controllers/st,stm32mp1-ddr.txt
> And the supply attributes depending on the DDR type (DDR3/LPDDR2/LPDDR3).
>
>For DDR3:
>- vdd-supply : phandle to the VDD/VDDQ regulator device tree node.
>- vref-supply : phandle to the VREFCA/VREFDQ regulator device tree
node.
>- vtt-supply : phandle to the VTT regulator device tree node.
>
>For LPDDR2/LPDDR3:
>- vdd1-supply : phandle to the VDD1 regulator device tree node.
>- vdd2-supply : phandle to the VDD2/VDDCA regulator device tree node.
>- vddq-supply : phandle to the VDDQ regulator device tree node.
the sequence are generic and some supply are optional
For example:
pmic: stpmic at 33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
status = "okay";
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo2-supply = <&v3v3>;
ldo3-supply = <&vdd_ddr>;
ldo5-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
...
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
...
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-always-on;
regulator-over-current-protection;
st,regulator-sink-source;
};
...
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
};
...
&ddr {
vdd-supply = <&vdd_ddr>;
vtt-supply = <&vtt_ddr>;
vref-supply = <&vref_ddr>;
};
And it is managed in TF-A code
=> ./plat/st/stm32mp1/plat_ddr.c
anyway for a first implementation it is OK with my remark on comaptible....
Regards
Patrick
>
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