[PATCH 04/10] ARM: stm32: Add STM32MP13xx PMIC initialization for DDR3 DRAM type

[Marek Vasut]

On 6/3/25 4:00 PM, Patrick DELAUNAY wrote:

Hi,

>> diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
>> index 45c2bb5bcea..b46f89dacb9 100644
>> --- a/board/st/common/stpmic1.c
>> +++ b/board/st/common/stpmic1.c
>> @@ -14,8 +14,19 @@
>>   #include <power/pmic.h>
>>   #include <power/stpmic1.h>
>> +static bool is_stm32mp13xx(void)
>> +{
>> +    if (!IS_ENABLED(CONFIG_STM32MP13X))
>> +        return false;
>> +
>> +    return of_machine_is_compatible("st,stm32mp131") ||
>> +           of_machine_is_compatible("st,stm32mp133") ||
>> +           of_machine_is_compatible("st,stm32mp135");
> 
> 
> return true;  ?
> 
> 
> no need to check compatible if U-Boot is compiled for STM32MP13x..

The compatible check is placed in here deliberately, in case U-Boot gets 
compiled with support for both MP15 and MP13 .

>> +}
>> +
>>   int board_ddr_power_init(enum ddr_type ddr_type)
>>   {
>> +    bool is_mp13 = is_stm32mp13xx();
>>       struct udevice *dev;
>>       bool buck3_at_1800000v = false;
>>       int ret;
>> @@ -30,18 +41,21 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>>       switch (ddr_type) {
>>       case STM32MP_DDR3:
>>           /* VTT = Set LDO3 to sync mode */
>> -        ret = pmic_reg_read(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3));
>> -        if (ret < 0)
>> -            return ret;
>> -
>> -        ret &= ~STPMIC1_LDO3_MODE;
>> -        ret &= ~STPMIC1_LDO12356_VOUT_MASK;
>> -        ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL);
>> -
>> -        ret = pmic_reg_write(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
>> -                     ret);
>> -        if (ret < 0)
>> -            return ret;
>> +        if (!is_mp13) {
>> +            /* Enable VTT only on STM32MP15xx */
>> +            ret = pmic_reg_read(dev, 
>> STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3));
>> +            if (ret < 0)
>> +                return ret;
>> +
>> +            ret &= ~STPMIC1_LDO3_MODE;
>> +            ret &= ~STPMIC1_LDO12356_VOUT_MASK;
>> +            ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL);
>> +
>> +            ret = pmic_reg_write(dev, 
>> STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
>> +                         ret);
>> +            if (ret < 0)
>> +                return ret;
>> +        }
>>           /* VDD_DDR = Set BUCK2 to 1.35V */
>>           ret = pmic_clrsetbits(dev,
>> @@ -69,11 +83,14 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>>           mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
>>           /* Enable VTT = LDO3 */
>> -        ret = pmic_clrsetbits(dev,
>> -                      STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
>> -                      STPMIC1_LDO_ENA, STPMIC1_LDO_ENA);
>> -        if (ret < 0)
>> -            return ret;
>> +        if (!is_mp13) {
>> +            /* Enable VTT only on STM32MP15xx */
>> +            ret = pmic_clrsetbits(dev,
>> +                          STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3),
>> +                          STPMIC1_LDO_ENA, STPMIC1_LDO_ENA);
>> +            if (ret < 0)
>> +                return ret;
>> +        }
>>           mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
> 
> 
> Support of VTT is not linked to SoC but to board design...
> 
> I think all this part should be reworked / based on TF-A binding

Sorry, no. TFA is not an authoritative source for DT bindings, so I 
don't want to add such bindings into U-Boot and support them for all 
eternity. Get those bindings upstream and then this can be reworked.

In the meantime, how do you propose VTT can be enabled/disabled per board ?