[PATCH 1/5] reset: rzg2l-usbphy-ctrl: Add new driver

[Marek Vasut]

On 3/4/25 5:37 PM, Paul Barker wrote:

[...]

> +static int rzg2l_usbphy_ctrl_assert(struct reset_ctl *reset_ctl)
> +{
> +	struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(reset_ctl->dev);
> +	u32 val;
> +
> +	val = readl(priv->regs + RESET);
> +	val |= reset_ctl->id ? PHY_RESET_PORT2 : PHY_RESET_PORT1;

u32 val = reset_ctl->id ? PHY_RESET_PORT2 : PHY_RESET_PORT1;

> +	/* If both ports are in reset, we can also place the PLL into reset. */
> +	if ((val & PHY_RESET_MASK) == PHY_RESET_MASK)
> +		val |= RESET_PLLRESET;

setbits_le32(priv->regs + RESET, val);

> +	writel(val, priv->regs + RESET);
> +	return 0;
> +}
> +
> +static int rzg2l_usbphy_ctrl_deassert(struct reset_ctl *reset_ctl)
> +{
> +	struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(reset_ctl->dev);
> +	u32 val;
> +
> +	val = readl(priv->regs + RESET);
> +	val &= ~(reset_ctl->id ? PHY_RESET_PORT2 : PHY_RESET_PORT1);
> +
> +	/* If either port is out of reset, the PLL must also be out of reset. */
> +	val |= RESET_SEL_PLLRESET;
> +	val &= ~RESET_PLLRESET;
> +
> +	writel(val, priv->regs + RESET);

clrsetbits_le32() please

> +	return 0;
> +}
> +
> +static int rzg2l_usbphy_ctrl_of_xlate(struct reset_ctl *reset_ctl,
> +				      struct ofnode_phandle_args *args)
> +{
> +	if (args->args[0] >= NUM_PORTS)
> +		return -EINVAL;
> +
> +	reset_ctl->id = args->args[0];
> +	return 0;
> +}
> +
> +struct reset_ops rzg2l_usbphy_ctrl_ops = {
> +	.rst_assert = rzg2l_usbphy_ctrl_assert,
> +	.rst_deassert = rzg2l_usbphy_ctrl_deassert,
> +	.of_xlate = rzg2l_usbphy_ctrl_of_xlate,
> +};
> +
> +static int rzg2l_usbphy_ctrl_probe(struct udevice *dev)
> +{
> +	struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(dev);
> +	struct reset_ctl rst;
> +	int ret;
> +
> +	priv->regs = dev_read_addr(dev);
> +
> +	ret = reset_get_by_index(dev, 0, &rst);
> +	if (ret < 0) {
> +		dev_err(dev, "failed to get reset line\n");

It generally helps to include 'ret' value in the error messages, so 
users can immediately look up the error code and find out what is wrong, 
without recompiling U-Boot.

> +		return ret;
> +	}
> +
> +	ret = reset_deassert(&rst);
> +	if (ret < 0) {
> +		dev_err(dev, "failed to de-assert reset line\n");

DTTO

> +		return ret;
> +	}
> +
> +	/* put pll and phy into reset state */
> +	setbits_le32(priv->regs + RESET,
> +		     RESET_SEL_PLLRESET | RESET_PLLRESET | PHY_RESET_MASK);
> +
> +	return 0;
> +}
> +
> +static const struct udevice_id rzg2l_usbphy_ctrl_ids[] = {
> +	{ .compatible = "renesas,rzg2l-usbphy-ctrl", },
> +	{ /* sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(rzg2l_usbphy_ctrl) = {
> +	.name           = "rzg2l_usbphy_ctrl",
> +	.id             = UCLASS_RESET,
> +	.of_match       = rzg2l_usbphy_ctrl_ids,
> +	.probe          = rzg2l_usbphy_ctrl_probe,
> +	.ops            = &rzg2l_usbphy_ctrl_ops,
> +	.priv_auto      = sizeof(struct rzg2l_usbphy_ctrl_priv),
> +};
> diff --git a/include/renesas/rzg2l-usbphy.h b/include/renesas/rzg2l-usbphy.h
> new file mode 100644
> index 000000000000..1a46b585f170
> --- /dev/null
> +++ b/include/renesas/rzg2l-usbphy.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * RZ/G2L USB PHY common definitions
> + *
> + * Copyright (C) 2021-2023 Renesas Electronics Corp.
> + */
> +
> +#ifndef RENESAS_RZG2L_USBPHY_H
> +#define RENESAS_RZG2L_USBPHY_H
> +
> +#include <fdtdec.h>
> +
> +struct rzg2l_usbphy_ctrl_priv {
> +	fdt_addr_t regs;
> +};
If this structure isn't shared with any other drivers, inline it into 
drivers/reset/reset-rzg2l-usbphy-ctrl.c and drop the header file.