[PATCH v2 4/4] board/BuR/zynq: initial commit

Bernhard Messerklinger bernhard.messerklinger at br-automation.com
Thu Mar 6 11:20:04 CET 2025


From: Michal Simek <michal.simek at amd.com>
Sent: Wednesday, February 26, 2025 11:23 AM
>On 2/11/25 13:49, Bernhard Messerklinger wrote:
>> This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170
>> boards. This boards are based on the Xilinx Zynq SoC.
>>
>> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger at br-automation.com>
>> ---
>>
>> Changes in v2:
>> - Remove all unnecessary device-tree entries
>> - Reviewed led names (no pattern restriction found)
>> - Fix maintainers file
>> - Cleanup of code
>> - Move preboot variable to env file
>>
>>   arch/arm/dts/Makefile                         |   8 +-
>>   arch/arm/dts/zynq-brcp1-u-boot.dtsi           | 110 +++++++
>>   arch/arm/dts/zynq-brcp1.dtsi                  | 133 +++++++++
>>   arch/arm/dts/zynq-brcp150-u-boot.dtsi         | 129 ++++++++
>>   arch/arm/dts/zynq-brcp150.dts                 | 174 +++++++++++
>>   arch/arm/dts/zynq-brcp170-u-boot.dtsi         | 113 +++++++
>>   arch/arm/dts/zynq-brcp170.dts                 | 140 +++++++++
>>   arch/arm/dts/zynq-brcp1_1r.dts                |  29 ++
>>   arch/arm/dts/zynq-brcp1_1r_switch.dts         |  30 ++
>>   arch/arm/dts/zynq-brcp1_2r.dts                |  22 ++
>>   arch/arm/dts/zynq-brsmarc2-u-boot.dtsi        | 110 +++++++
>>   arch/arm/dts/zynq-brsmarc2.dts                | 158 ++++++++++
>>   arch/arm/mach-zynq/Kconfig                    |   1 +
>>   board/BuR/zynq/Kconfig                        |  14 +
>>   board/BuR/zynq/MAINTAINERS                    |  11 +
>>   board/BuR/zynq/Makefile                       |  15 +
>>   board/BuR/zynq/brcp150/board.c                |   4 +
>>   board/BuR/zynq/brcp150/ps7_init_gpl.c         | 278 ++++++++++++++++++
>>   board/BuR/zynq/brcp170/board.c                |   4 +
>>   board/BuR/zynq/brcp170/ps7_init_gpl.c         | 274 +++++++++++++++++
>>   board/BuR/zynq/brcp1_1r/board.c               |   4 +
>>   board/BuR/zynq/brcp1_1r/ps7_init_gpl.c        | 274 +++++++++++++++++
>>   board/BuR/zynq/brcp1_1r_switch/board.c        |   4 +
>>   board/BuR/zynq/brcp1_1r_switch/ps7_init_gpl.c | 270 +++++++++++++++++
>>   board/BuR/zynq/brcp1_2r/board.c               |   4 +
>>   board/BuR/zynq/brcp1_2r/ps7_init_gpl.c        | 277 +++++++++++++++++
>>   board/BuR/zynq/brsmarc2/board.c               |  30 ++
>>   board/BuR/zynq/brsmarc2/ps7_init_gpl.c        | 276 +++++++++++++++++
>>   board/BuR/zynq/common/board.c                 | 231 +++++++++++++++
>>   board/BuR/zynq/env/brcp1.env                  | 109 +++++++
>>   board/BuR/zynq/env/brcp150.env                | 119 ++++++++
>>   configs/brcp150_defconfig                     | 123 ++++++++
>>   configs/brcp170_defconfig                     | 122 ++++++++
>>   configs/brcp1_1r_defconfig                    | 122 ++++++++
>>   configs/brcp1_1r_switch_defconfig             | 123 ++++++++
>>   configs/brcp1_2r_defconfig                    | 122 ++++++++
>>   configs/brsmarc2_defconfig                    | 122 ++++++++
>>   include/configs/brzynq.h                      |  21 ++
>>   38 files changed, 4109 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/arm/dts/zynq-brcp1-u-boot.dtsi
>>   create mode 100644 arch/arm/dts/zynq-brcp1.dtsi
>>   create mode 100644 arch/arm/dts/zynq-brcp150-u-boot.dtsi
>>   create mode 100644 arch/arm/dts/zynq-brcp150.dts
>>   create mode 100644 arch/arm/dts/zynq-brcp170-u-boot.dtsi
>>   create mode 100644 arch/arm/dts/zynq-brcp170.dts
>>   create mode 100644 arch/arm/dts/zynq-brcp1_1r.dts
>>   create mode 100644 arch/arm/dts/zynq-brcp1_1r_switch.dts
>>   create mode 100644 arch/arm/dts/zynq-brcp1_2r.dts
>>   create mode 100644 arch/arm/dts/zynq-brsmarc2-u-boot.dtsi
>>   create mode 100644 arch/arm/dts/zynq-brsmarc2.dts
>>   create mode 100644 board/BuR/zynq/Kconfig
>>   create mode 100644 board/BuR/zynq/MAINTAINERS
>>   create mode 100644 board/BuR/zynq/Makefile
>>   create mode 100644 board/BuR/zynq/brcp150/board.c
>>   create mode 100644 board/BuR/zynq/brcp150/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/brcp170/board.c
>>   create mode 100644 board/BuR/zynq/brcp170/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/brcp1_1r/board.c
>>   create mode 100644 board/BuR/zynq/brcp1_1r/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/brcp1_1r_switch/board.c
>>   create mode 100644 board/BuR/zynq/brcp1_1r_switch/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/brcp1_2r/board.c
>>   create mode 100644 board/BuR/zynq/brcp1_2r/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/brsmarc2/board.c
>>   create mode 100644 board/BuR/zynq/brsmarc2/ps7_init_gpl.c
>>   create mode 100644 board/BuR/zynq/common/board.c
>>   create mode 100644 board/BuR/zynq/env/brcp1.env
>>   create mode 100644 board/BuR/zynq/env/brcp150.env
>>   create mode 100644 configs/brcp150_defconfig
>>   create mode 100644 configs/brcp170_defconfig
>>   create mode 100644 configs/brcp1_1r_defconfig
>>   create mode 100644 configs/brcp1_1r_switch_defconfig
>>   create mode 100644 configs/brcp1_2r_defconfig
>>   create mode 100644 configs/brsmarc2_defconfig
>>   create mode 100644 include/configs/brzynq.h
>>
>> diff --git a/arch/arm/dts/zynq-brcp1.dtsi b/arch/arm/dts/zynq-brcp1.dtsi
>> new file mode 100644
>> index 00000000000..f1cf75f1277
>> --- /dev/null
>> +++ b/arch/arm/dts/zynq-brcp1.dtsi
>> @@ -0,0 +1,133 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright 2024 B&R Industrial Automation GmbH
>> + */
>> +
>> +/include/ "zynq-7000.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/ {
>> +     model = "BRCP1 CPU";
>> +     compatible = "br,cp1",
>> +                  "xlnx,zynq-7000";
>> +
>> +     aliases {
>> +             i2c0 = &i2c0;
>> +             serial0 = &uart0;
>> +             spi0 = &qspi;
>> +             mmc0 = &sdhci0;
>> +     };
>> +
>> +     memory {
>> +             device_type = "memory";
>> +             reg = <0x0 0x40000000>;
>> +     };
>> +
>> +     chosen {
>> +             stdout-path = "serial0:115200n8";
>> +     };
>> +
>> +     usb_phy0: phy0 {
>> +             compatible = "usb-nop-xceiv";
>> +             #phy-cells = <0>;
>> +     };
>> +
>> +     brd_rst: board_reset {
>> +             compatible = "br,board-reset";
>> +             pin = <&gpio0 9 GPIO_ACTIVE_HIGH>;
>> +     };
>> +
>> +     leds {
>> +             compatible = "gpio-leds";
>> +             se_green {
>> +                     label = "S_E_GREEN";
>> +                     gpios = <&ledgpio 0 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +             se_red {
>> +                     label = "S_E_RED";
>> +                     gpios = <&ledgpio 1 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +             rdy_f_yellow {
>> +                     label = "RDY_F_YELLOW";
>> +                     gpios = <&ledgpio 2 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +             re_green {
>> +                     label = "R_E_GREEN";
>> +                     gpios = <&ledgpio 3 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +             re_red {
>> +                     label = "R_E_RED";
>> +                     gpios = <&ledgpio 4 GPIO_ACTIVE_HIGH>;
>> +                     default-state = "off";
>> +             };
>> +             plk_se_green {
>> +                     label = "PLK_S_E_GREEN";
>> +                     gpios = <&ledgpio 5 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +             eth_se_green {
>> +                     label = "ETH_S_E_GREEN";
>> +                     gpios = <&ledgpio 6 GPIO_ACTIVE_LOW>;
>> +                     default-state = "off";
>> +             };
>> +     };
>> +};
>> +
>> +#include "zynq-brcp1-u-boot.dtsi"
>
>
>Why? It should be added automatically when you run build.

This is not case for me since I have 3 base device-trees:
zynq-brcp1_1r.dts
zynq-brcp1_1r_switch.dts
zynq-brcp1_2r.dts

This device-trees include the same base file zynq-brcp1.dtsi.
The file zynq-brcp1-u-boot.dtsi is needed in all 3 of the above files.
But the zynq-brcp1.dtsi file naming doesn't trigger the automatic include of the
zynq-brcp1-u-boot.dtsi file.

My approach is to include zynq-brcp1-u-boot.dtsi manually.

Also I don't think it is a good idea to create 5 u-boot dtb files:
zynq-brcp1_1r-u-boot.dtsi
zynq-brcp1_1r_switch-u-boot.dtsi
zynq-brcp1_2r-u-boot.dtsi

Perhaps you have a better suggestion for this problem?

>
>> +
>> +&i2c0 {
>> +     status = "okay";
>> +     clock-frequency = <100000>;
>> +
>> +     ledgpio: max7320 at 5d {   /* board LED */
>> +             status = "okay";
>> +             compatible = "maxim,max7320";
>> +             reg = <0x5d>;
>> +             #gpio-cells = <2>;
>> +             gpio-controller;
>> +             ngpios = <8>;
>> +     };
>> +
>> +     pmic0: da9062 at 58 {
>> +             compatible = "dlg,da9062";
>> +             reg = <0x58>;
>> +     };
>> +};
>> +
>> +&sdhci0 {
>> +     status = "okay";
>> +     max-frequency = <25000000>;
>> +};
>> +
>> +&uart0 {
>> +     status = "okay";
>> +};
>> +
>> +&qspi {
>> +     status = "okay";
>> +     spi-max-frequency = <100000000>;
>> +
>> +     spi_flash: spiflash at 0 {
>> +             #address-cells = <1>;
>> +             #size-cells = <1>;
>> +             compatible = "jedec,spi-nor", "spi-flash", "s25fl256s1";
>> +             spi-max-frequency = <100000000>;
>> +             spi-cpol;
>> +             spi-cpha;
>> +             reg = <0>;
>> +     };
>> +};
>> +
>> +&usb0 {
>> +     status = "okay";
>> +     dr_mode = "host";
>> +     usb-phy = <&usb_phy0>;
>> +};
>> +
>> +&gpio0 {
>> +     status = "okay";
>> +};
>
>I am fine with this way. My part is pretty much only that wiring and this file
>and separation in Makefile works for me.
>
>Thanks,
>Michal

Thank you,
I will fix the rest and send an V3.

Regards,
Bernhard


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