[PATCH v1 1/2] arm: socfpga: mailbox: Notify SDM on HPS code execution stages

[Chee, Tien Fong]

> -----Original Message-----
> From: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>
> Sent: Tuesday, March 11, 2025 2:39 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tom Rini <trini at konsulko.com>; Meng,
> Tingting <tingting.meng at altera.com>; Ng, Boon Khai
> <boon.khai.ng at altera.com>; Maniyam, Dinesh
> <dinesh.maniyam at altera.com>; Rao, Mahesh <mahesh.rao at altera.com>;
> Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>
> Subject: [PATCH v1 1/2] arm: socfpga: mailbox: Notify SDM on HPS code
> execution stages
> 
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> 
> Introducing a new mailbox command "HPS_STAGE_NOTIFY" to notify Secure
> Device Manager (SDM) on the stage of HPS code execution.
> 
> Generally, there are three main code execution stages: First Stage Boot
> Loader (FSBL) which is U-Boot SPL, Second Stage Boot Loader (SSBL) which is
> U-Boot, and the Operating System (OS) which is Linux.
> 
> This enables the user to query the SDM for HPS error details.
> 
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> ---
>  arch/arm/mach-socfpga/include/mach/mailbox_s10.h |  4 ++++
>  arch/arm/mach-socfpga/mailbox_s10.c              | 12 ++++++++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
> b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
> index 45cc9912f94..2099c51b682 100644
> --- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
> +++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
> @@ -128,6 +128,7 @@ enum ALT_SDM_MBOX_RESP_CODE {
>  #define MBOX_QSPI_CLOSE		51
>  #define MBOX_QSPI_DIRECT	59
>  #define MBOX_REBOOT_HPS		71
> +#define MBOX_HPS_STAGE_NOTIFY		93
> 
>  /* Mailbox registers */
>  #define MBOX_CIN			0	/* command valid offset */
> @@ -385,6 +386,8 @@ enum MBOX_CFGSTAT_MINOR_ERR_CODE {
>  #define RCF_SOFTFUNC_STATUS_SEU_ERROR			BIT(3)
>  #define RCF_PIN_STATUS_NSTATUS				BIT(31)
> 
> +#define HPS_EXECUTION_STATE_FSBL	0
> +
>  int mbox_send_cmd(u8 id, u32 cmd, u8 is_indirect, u32 len, u32 *arg, u8
> urgent,
>  		  u32 *resp_buf_len, u32 *resp_buf);
>  int mbox_send_cmd_psci(u8 id, u32 cmd, u8 is_indirect, u32 len, u32 *arg,
> @@ -401,6 +404,7 @@ int mbox_qspi_open(void);  #endif
> 
>  int mbox_reset_cold(void);
> +int mbox_hps_stage_notify(u32 execution_stage);
>  int mbox_get_fpga_config_status(u32 cmd);  int
> mbox_get_fpga_config_status_psci(u32 cmd);  #endif /* _MAILBOX_S10_H_
> */ diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-
> socfpga/mailbox_s10.c
> index b69bd3e47ec..f9c34e85711 100644
> --- a/arch/arm/mach-socfpga/mailbox_s10.c
> +++ b/arch/arm/mach-socfpga/mailbox_s10.c
> @@ -6,6 +6,7 @@
> 
>  #include <asm/arch/clock_manager.h>
>  #include <asm/arch/mailbox_s10.h>
> +#include <asm/arch/smc_api.h>
>  #include <asm/arch/system_manager.h>
>  #include <asm/global_data.h>
>  #include <asm/io.h>
> @@ -474,6 +475,17 @@ int __secure mbox_send_cmd_psci(u8 id, u32 cmd,
> u8 is_indirect, u32 len,
>  					  urgent, resp_buf_len, resp_buf);  }
> 
> +int mbox_hps_stage_notify(u32 execution_stage) { #if
> +!defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
> +	return smc_send_mailbox(MBOX_HPS_STAGE_NOTIFY, 1,
> &execution_stage,
> +				0, 0, NULL);
> +#else
> +	return mbox_send_cmd(MBOX_ID_UBOOT,
> MBOX_HPS_STAGE_NOTIFY,
> +			     MBOX_CMD_DIRECT, 1, &execution_stage, 0, 0,
> NULL); #endif }
> +
>  int mbox_send_cmd_only(u8 id, u32 cmd, u8 is_indirect, u32 len, u32 *arg)  {
>  	return mbox_send_cmd_only_common(id, cmd, is_indirect, len, arg);
> --
> 2.25.1

Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong