[PATCH v1 2/2] arm: socfpga: spl: Notify SDM on FSBL execution

[Chee, Tien Fong]

> -----Original Message-----
> From: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>
> Sent: Tuesday, March 11, 2025 2:39 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tom Rini <trini at konsulko.com>; Meng,
> Tingting <tingting.meng at altera.com>; Ng, Boon Khai
> <boon.khai.ng at altera.com>; Maniyam, Dinesh
> <dinesh.maniyam at altera.com>; Rao, Mahesh <mahesh.rao at altera.com>;
> Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>
> Subject: [PATCH v1 2/2] arm: socfpga: spl: Notify SDM on FSBL execution
> 
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> 
> Send out "HPS_STAGE_NOTIFY" mailbox command to the Secure Device
> Manager (SDM) in SPL to inform SDM on FSBL execution.
> 
> This is necessary for the SDM to recognize that the FSBL stage has begun its
> execution and should be made as early as possible in the FSBL process.
> 
> Therefore, the mailbox will initialize and send out the notification right after
> the completion of timer initialization.
> 
> Signed-off-by: Mahesh Rao <mahesh.rao at altera.com>
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> ---
>  arch/arm/mach-socfpga/spl_agilex.c  | 6 ++++--  arch/arm/mach-
> socfpga/spl_agilex5.c | 6 ++++--
>  arch/arm/mach-socfpga/spl_n5x.c     | 6 ++++--
>  arch/arm/mach-socfpga/spl_s10.c     | 6 ++++--
>  4 files changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-
> socfpga/spl_agilex.c
> index 52617a39cca..91c27a5543d 100644
> --- a/arch/arm/mach-socfpga/spl_agilex.c
> +++ b/arch/arm/mach-socfpga/spl_agilex.c
> @@ -50,6 +50,10 @@ void board_init_f(ulong dummy)
> 
>  	timer_init();
> 
> +	mbox_init();
> +
> +	mbox_hps_stage_notify(HPS_EXECUTION_STATE_FSBL);
> +
>  	sysmgr_pinmux_init();
> 
>  	ret = uclass_get_device(UCLASS_CLK, 0, &dev); @@ -77,8 +81,6 @@
> void board_init_f(ulong dummy)
>  	}
>  #endif
> 
> -	mbox_init();
> -
>  #ifdef CONFIG_CADENCE_QSPI
>  	mbox_qspi_open();
>  #endif
> diff --git a/arch/arm/mach-socfpga/spl_agilex5.c b/arch/arm/mach-
> socfpga/spl_agilex5.c
> index 3451611082d..a9aad5350d2 100644
> --- a/arch/arm/mach-socfpga/spl_agilex5.c
> +++ b/arch/arm/mach-socfpga/spl_agilex5.c
> @@ -62,6 +62,10 @@ void board_init_f(ulong dummy)
> 
>  	timer_init();
> 
> +	mbox_init();
> +
> +	mbox_hps_stage_notify(HPS_EXECUTION_STATE_FSBL);
> +
>  	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
>  	if (ret) {
>  		debug("Clock init failed: %d\n", ret); @@ -100,8 +104,6 @@
> void board_init_f(ulong dummy)
>  		}
>  	}
> 
> -	mbox_init();
> -
>  	if (IS_ENABLED(CONFIG_CADENCE_QSPI))
>  		mbox_qspi_open();
> 
> diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-
> socfpga/spl_n5x.c index 5ff137e5c6f..81283ef7162 100644
> --- a/arch/arm/mach-socfpga/spl_n5x.c
> +++ b/arch/arm/mach-socfpga/spl_n5x.c
> @@ -49,6 +49,10 @@ void board_init_f(ulong dummy)
> 
>  	timer_init();
> 
> +	mbox_init();
> +
> +	mbox_hps_stage_notify(HPS_EXECUTION_STATE_FSBL);
> +
>  	sysmgr_pinmux_init();
> 
>  	preloader_console_init();
> @@ -84,8 +88,6 @@ void board_init_f(ulong dummy)
>  	}
>  #endif
> 
> -	mbox_init();
> -
>  #ifdef CONFIG_CADENCE_QSPI
>  	mbox_qspi_open();
>  #endif
> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
> socfpga/spl_s10.c index 53852cb7443..fa83ff96adc 100644
> --- a/arch/arm/mach-socfpga/spl_s10.c
> +++ b/arch/arm/mach-socfpga/spl_s10.c
> @@ -52,6 +52,10 @@ void board_init_f(ulong dummy)
>  	socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0);
>  	timer_init();
> 
> +	mbox_init();
> +
> +	mbox_hps_stage_notify(HPS_EXECUTION_STATE_FSBL);
> +
>  	sysmgr_pinmux_init();
> 
>  	/* configuring the HPS clocks */
> @@ -84,8 +88,6 @@ void board_init_f(ulong dummy)
>  		}
>  #endif
> 
> -	mbox_init();
> -
>  #ifdef CONFIG_CADENCE_QSPI
>  	mbox_qspi_open();
>  #endif
> --
> 2.25.1

Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong