[PATCH 2/2] mtd: spi-nor-core: Rework spansion_sr_ready() for parallel memories support
Takahiro Kuwano
tkuw584924 at gmail.com
Sat Mar 15 01:12:25 CET 2025
On 3/14/2025 11:54 PM, Tom Rini wrote:
> On Fri, Mar 14, 2025 at 07:40:17AM +0000, Tudor Ambarus wrote:
>> + Marek,
>>
>> Hi,
>>
>> On 3/14/25 5:53 AM, tkuw584924 at gmail.com wrote:
>>> spansion_sr_ready() needs to support parallel memories configuration,
>>> that reads status register value from each devices and combines the
>>> status bits, likewise read_sr() and read_fsr().
>>
>> SNOR_F_HAS_PARALLEL describes 2 flashes that work in parallel mode. And
>> we hacked SPI NOR and used a single spi_nor object to handle both
>> flashes which is obviously wrong.
>>
>> My 2c is that we shouldn't build on top of a crumbling foundation. Until
>> everything's moved on top of SPI NOR, I'd accept just fixes on this
>> subject, so no new support. Tom and Jagan to decide.
>
> Yes, I believe I was expecting some patches to redo / rework what we
> have in-tree currently.
>
Understood our current position and status, thanks!
Takahiro
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