[PATCH] common: spl: Enable Instruction cache after relocation in board_init_r

[Prasanth Babu Mantena]

ICACHE is enabled in board_init_f which executes only before relocation.
Instruction cache invalidation is needed after relocation as well in the
common spl, which is taken care in the u-boot init_sequence, but missing
for the spl. So, enable it at the start of board_init_r for spl, which
invalidates icache needed after instruction relocation.

Fixes: 52a86e69e20 ("arm: k3: Enable instruction cache for main domain SPL")
Signed-off-by: Prasanth Babu Mantena <p-mantena at ti.com>
---
 arch/arm/mach-k3/common.c | 1 +
 common/spl/spl.c          | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index fa8cd93d664..e4eb33512e7 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -266,6 +266,7 @@ static __maybe_unused void k3_dma_remove(void)
 void spl_board_prepare_for_boot(void)
 {
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+	icache_disable();
 	dcache_disable();
 #endif
 #if IS_ENABLED(CONFIG_SPL_DMA) && IS_ENABLED(CONFIG_SPL_DM_DEVICE_REMOVE)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 76fd56dfe4b..1db9a258e35 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -696,6 +696,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	debug(">>" PHASE_PROMPT "board_init_r()\n");
 
 	spl_set_bd();
+	enable_caches();
 
 	if (IS_ENABLED(CONFIG_SPL_SYS_MALLOC)) {
 		mem_malloc_init(SPL_SYS_MALLOC_START, SPL_SYS_MALLOC_SIZE);
-- 
2.34.1