[PATCH 1/3] arm64: versal-net: Add PL bit stream load support
Prasad Kummari
prasad.kummari at amd.com
Thu Mar 27 11:51:58 CET 2025
Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.
The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.
Signed-off-by: Prasad Kummari <prasad.kummari at amd.com>
---
arch/arm/mach-versal-net/Kconfig | 1 -
board/xilinx/versal-net/Kconfig | 17 -----
board/xilinx/versal-net/Makefile | 1 -
board/xilinx/versal-net/board.c | 12 ++++
board/xilinx/versal-net/cmds.c | 80 ------------------------
configs/xilinx_versal_net_virt_defconfig | 2 +
include/xilinx.h | 1 +
7 files changed, 15 insertions(+), 99 deletions(-)
delete mode 100644 board/xilinx/versal-net/Kconfig
delete mode 100644 board/xilinx/versal-net/cmds.c
diff --git a/arch/arm/mach-versal-net/Kconfig b/arch/arm/mach-versal-net/Kconfig
index 54fb93aeb53..7def7b9139a 100644
--- a/arch/arm/mach-versal-net/Kconfig
+++ b/arch/arm/mach-versal-net/Kconfig
@@ -45,6 +45,5 @@ config ZYNQ_SDHCI_MAX_FREQ
default 200000000
source "board/xilinx/Kconfig"
-source "board/xilinx/versal-net/Kconfig"
endif
diff --git a/board/xilinx/versal-net/Kconfig b/board/xilinx/versal-net/Kconfig
deleted file mode 100644
index 2484429d3cb..00000000000
--- a/board/xilinx/versal-net/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Copyright (C) 2020 - 2022, Xilinx, Inc.
-# Copyright (C) 2022, Advanced Micro Devices, Inc.
-#
-
-if ARCH_VERSAL_NET
-
-config CMD_VERSAL_NET
- bool "Enable Versal NET specific commands"
- default y
- depends on ZYNQMP_FIRMWARE
- help
- Select this to enable Versal NET specific commands.
- Commands like versalnet loadpdi are enabled by this.
-
-endif
diff --git a/board/xilinx/versal-net/Makefile b/board/xilinx/versal-net/Makefile
index f9ff07c11c6..2008d4e231c 100644
--- a/board/xilinx/versal-net/Makefile
+++ b/board/xilinx/versal-net/Makefile
@@ -7,4 +7,3 @@
#
obj-y := board.o
-obj-$(CONFIG_CMD_VERSAL_NET) += cmds.o
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 4d5913cff1d..870877fb4a8 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -21,6 +21,7 @@
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
+#include <versalpl.h>
#include "../common/board.h"
#include <linux/bitfield.h>
@@ -29,10 +30,21 @@
DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_FPGA_VERSALPL)
+static xilinx_desc versalpl = {
+ xilinx_versal_net, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
+ FPGA_LEGACY
+};
+#endif
+
int board_init(void)
{
printf("EL Level:\tEL%d\n", current_el());
+#if defined(CONFIG_FPGA_VERSALPL)
+ fpga_init();
+ fpga_add(fpga_xilinx, &versalpl);
+#endif
return 0;
}
diff --git a/board/xilinx/versal-net/cmds.c b/board/xilinx/versal-net/cmds.c
deleted file mode 100644
index e8b669f0fd4..00000000000
--- a/board/xilinx/versal-net/cmds.c
+++ /dev/null
@@ -1,80 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2023, Advanced Micro Devices, Inc.
- *
- * Michal Simek <michal.simek at amd.com>
- */
-
-#include <cpu_func.h>
-#include <command.h>
-#include <log.h>
-#include <memalign.h>
-#include <versalpl.h>
-#include <vsprintf.h>
-#include <zynqmp_firmware.h>
-
-/**
- * do_versalnet_load_pdi - Handle the "versalnet load pdi" command-line command
- * @cmdtp: Command data struct pointer
- * @flag: Command flag
- * @argc: Command-line argument count
- * @argv: Array of command-line arguments
- *
- * Processes the Versal NET load pdi command
- *
- * Return: return 0 on success, Error value if command fails.
- * CMD_RET_USAGE incase of incorrect/missing parameters.
- */
-static int do_versalnet_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc,
- char * const argv[])
-{
- u32 buf_lo, buf_hi;
- u32 ret_payload[PAYLOAD_ARG_CNT];
- ulong addr, *pdi_buf;
- size_t len;
- int ret;
-
- if (argc != cmdtp->maxargs) {
- debug("pdi_load: incorrect parameters passed\n");
- return CMD_RET_USAGE;
- }
-
- addr = simple_strtol(argv[1], NULL, 16);
- if (!addr) {
- debug("pdi_load: zero pdi_data address\n");
- return CMD_RET_USAGE;
- }
-
- len = hextoul(argv[2], NULL);
- if (!len) {
- debug("pdi_load: zero size\n");
- return CMD_RET_USAGE;
- }
-
- pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN);
- if ((ulong)addr != (ulong)pdi_buf) {
- memcpy((void *)pdi_buf, (void *)addr, len);
- debug("Pdi addr:0x%lx aligned to 0x%lx\n",
- addr, (ulong)pdi_buf);
- }
-
- flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len);
-
- buf_lo = lower_32_bits((ulong)pdi_buf);
- buf_hi = upper_32_bits((ulong)pdi_buf);
-
- ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
- buf_hi, 0, ret_payload);
- if (ret)
- printf("PDI load failed with err: 0x%08x\n", ret);
-
- return cmd_process_error(cmdtp, ret);
-}
-
-U_BOOT_LONGHELP(versalnet,
- "loadpdi addr len - Load pdi image\n"
- "load pdi image at ddr address 'addr' with pdi image size 'len'\n");
-
-U_BOOT_CMD_WITH_SUBCMDS(versalnet, "Versal NET sub-system", versalnet_help_text,
- U_BOOT_SUBCMD_MKENT(loadpdi, 3, 1,
- do_versalnet_load_pdi));
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index 1604b5915db..4da31b5c119 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -73,6 +73,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_CLK_VERSAL=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_VERSALPL=y
CONFIG_ARM_FFA_TRANSPORT=y
CONFIG_ZYNQ_GPIO=y
CONFIG_DM_I2C=y
diff --git a/include/xilinx.h b/include/xilinx.h
index e4e29797988..2b4d6c9bb06 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -34,6 +34,7 @@ typedef enum { /* typedef xilinx_family */
xilinx_zynq, /* Zynq Family */
xilinx_zynqmp, /* ZynqMP Family */
xilinx_versal, /* Versal Family */
+ xilinx_versal_net, /* Versal NET Family */
max_xilinx_type /* insert all new types before this */
} xilinx_family; /* end, typedef xilinx_family */
--
2.25.1
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