[PATCH v3 1/4] board: bsh: imx6ulz_smm_m2: Match SPL DDR settings to DCD table

[Fabio Estevam]

On Wed, May 21, 2025 at 6:58 AM Dario Binacchi
<dario.binacchi at amarulasolutions.com> wrote:
>
> From: Michael Trimarchi <michael at amarulasolutions.com>
>
> When using SPL on i.mx6 we frequently notice some DDR initialization
> mismatches between the SPL code and the non-SPL code.
>
> As the non-SPL code have been tested for long time and proves to be
> reliable, let's configure the DDR in the exact same way as the non-SPL
> case.
>
> The idea is simple: just use the DCD table and write directly to the DDR
> registers.
>
> Signed-off-by: Michael Trimarchi <michael at amarulasolutions.com>
> Signed-off-by: Dario Binacchi <dario.binacchi at amarulasolutions.com>

Applied the series, thanks.