回复: 回复: [PATCH v2] firmware: scmi: Add clock v3.2 CONFIG_SET support
Alice Guo (OSS)
alice.guo at oss.nxp.com
Mon Nov 3 10:25:28 CET 2025
> -----邮件原件-----
> 发件人: Marek Vasut <marek.vasut at mailbox.org>
> 发送时间: 2025年11月3日 1:39
> 收件人: Alice Guo (OSS) <alice.guo at oss.nxp.com>; Marek Vasut
> <marek.vasut+renesas at mailbox.org>; u-boot at lists.denx.de
> 抄送: Vinh Nguyen <vinh.nguyen.xz at renesas.com>; Alice Guo
> <alice.guo at nxp.com>; Cristian Marussi <cristian.marussi at arm.com>; Patrice
> Chotard <patrice.chotard at foss.st.com>; Patrick Delaunay
> <patrick.delaunay at foss.st.com>; Peng Fan <peng.fan at nxp.com>; Sean
> Anderson <seanga2 at gmail.com>; Tom Rini <trini at konsulko.com>; Valentin
> Caron <valentin.caron at foss.st.com>; Ye Li <ye.li at nxp.com>
> 主题: Re: 回复: [PATCH v2] firmware: scmi: Add clock v3.2 CONFIG_SET support
>
> On 10/29/25 9:54 AM, Alice Guo (OSS) wrote:
>
> Hello Alice,
>
> > I tested this patch on IMX95 and here is the log:
> > U-Boot SPL 2026.01-rc1-00001-g9bb6f2fc0f57 (Oct 29 2025 - 16:42:02
> > +0800) SYS Boot reason: por, origin: -1, errid: -1 Normal Boot Trying
> > to boot from MMC2 Primary set selected Load image from MMC/SD 0xd7000
> > NOTICE: BL31: v2.12.0(release):android-16.0.0_1.0.0-rc2-2-ga266ff458
> > NOTICE: BL31: Built : 10:13:07, Oct 17 2025
> >
> >
> > U-Boot 2026.01-rc1-00001-g9bb6f2fc0f57 (Oct 29 2025 - 16:42:02 +0800)
> >
> > CPU: NXP i.MX95 Rev2.0 A55 at 1800 MHz
> > Model: NXP i.MX95 19X19 board
> > DRAM: 15.8 GiB
> > Core: 283 devices, 24 uclasses, devicetree: separate
> > MMC: "Synchronous Abort" handler, esr 0x96000006, far 0x0
> > elr: 0000000090233fac lr : 0000000090233f60 (reloc)
> > elr: 00000000fff4dfac lr : 00000000fff4df60
> > x0 : 0000000000000004 x1 : 00000000fdf089c8
> > x2 : 000000000000000c x3 : 00000000fdf19f18
> > x4 : 000000000000001f x5 : 0000000000000000
> > x6 : 00000000000013f0 x7 : 00000000fdf08bb0
> > x8 : 00000000000013e0 x9 : 00000000fdf087fc
> > x10: 0000000000000003 x11: 00000000000013c0
> > x12: 0000000000000000 x13: 00000000fdf08bb0
> > x14: 00000000fffffffb x15: 0000000000000002
> > x16: 00000000fff6887c x17: 0000000000000000
> > x18: 00000000fdf19dd0 x19: 00000000fdf2c640
> > x20: 0000000000000001 x21: 0000000000000000
> > x22: 00000000fffa7750 x23: 00000000fdf29f30
> > x24: 00000000fdf2dd58 x25: 0000000000000000
> > x26: 0000000000000000 x27: 0000000000000000
> > x28: 0000000000000000 x29: 00000000fdf08950
> >
> > Code: f90047e2 f9004be1 9101e3e1 f9004fe0 (b94002a0) Resetting CPU ...
> >
> > resetting ...
> >
> > Store the protocol version in a global variable "ver" during probe, and use it in
> scmi_clk_gate() instead of accessing priv->version. In this setup, the IMX95
> board boots successfully.
>
> No global variables please.
>
> How does this crash even happen on MX95 ? I verified that the private data are
> the same pointer in both probe and scmi_clk_gate(), so is the parent device. I
> think this is either not the case for MX95 (how would that happen?) or the
> private data or device is NULL or something ? Can you please apply the diff
> below and share the output ?
>
> "
> diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index
> 005968e8b75..dcc71ea4225 100644
> --- a/drivers/clk/clk_scmi.c
> +++ b/drivers/clk/clk_scmi.c
> @@ -137,6 +137,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int
> clkid, char *name,
> static int scmi_clk_gate(struct clk *clk, int enable)
> {
> struct scmi_clock_priv *priv = dev_get_priv(clk->dev->parent);
> +printf("%s[%d] dev=%px / %px priv=%px\n", __func__, __LINE__, clk->dev,
> clk->dev->parent, priv);
> struct scmi_clk_state_in_v1 in_v1 = {
> .clock_id = clk_get_id(clk),
> .attributes = enable,
> @@ -335,6 +336,8 @@ static int scmi_clk_probe(struct udevice *dev)
> ret = scmi_generic_protocol_version(dev, SCMI_PROTOCOL_ID_CLOCK,
> &priv->version);
>
> +printf("%s[%d] dev=%px priv=%px\n", __func__, __LINE__, dev, priv);
> +
> /* register CCF children: CLK UCLASS, no probed again */
> if (device_get_uclass_id(dev->parent) == UCLASS_CLK)
> return 0;
> "
>
> Thank you !
U-Boot 2026.01-rc1-00200-gf99ba9c02db2-dirty (Nov 03 2025 - 16:40:03 +0800)
CPU: NXP i.MX95 Rev2.0 A55 at 1800 MHz
Model: NXP i.MX95 19X19 board
DRAM: 15.8 GiB
scmi_clk_probe[301] dev=00000000fdf1e190 priv=00000000fdf20030
scmi_clk_gate[138] dev=00000000fdf2a390 / 00000000fdf1e190 priv=00000000fdf20030
scmi_clk_gate[138] dev=00000000fdf24210 / 00000000fdf1e190 priv=00000000fdf20030Core: 283 devices, 24 uclasses, devicetree: separate
MMC: scmi_clk_gate[138] dev=00000000fdf2c690 / 00000000fdf20c50 priv=0000000000000000
"Synchronous Abort" handler, esr 0x96000006, far 0x0
More information about the U-Boot
mailing list