[PATCH] mach-k3: Kconfig: fix NR_DRAM_BANKS for AM62x and AM64x

[Bryan Brattlof]

On November  4, 2025 thus sayeth Anshul Dalal:
> CONFIG_NR_DRAM_BANKS was improperly configured for AM64x and AM62x.
> 
> Although the commit b7d70fe68b9c ("configs: am62x: fix
> CONFIG_NR_DRAM_BANKS to 1") fixed the issue for AM62x, a better fix
> would have been to default to the correct value based on the SoC type
> instead of relying on board defconfigs to set the correct value.
> 
> Fixes: 01fa91bd5bbc ("arm: mach-k3: Set NR_DRAM_BANKS to 2")
> Fixes: 55afd2d8f5af ("configs: am64x_evm_a53: Add Initial support")
> Fixes: ca1d803a4740 ("configs: am64x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig")
> Signed-off-by: Anshul Dalal <anshuld at ti.com>
> ---
>  arch/arm/mach-k3/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> index 1b8c0b1eb968f0414107c0bf3142f744ce8364c8..9c99cf4744410601f770838aae29d3643c4f170b 100644
> --- a/arch/arm/mach-k3/Kconfig
> +++ b/arch/arm/mach-k3/Kconfig
> @@ -155,6 +155,7 @@ config K3_X509_SWRV
>  	  SWRV for X509 certificate used for boot images
>  
>  config NR_DRAM_BANKS
> +	default 1 if (SOC_K3_AM625 || SOC_K3_AM642)

Why does AM625 fall into this category? I can understand the AM64 which 
only have 15 address lines for the DDR controller but the entire AM62* 
family should be able to back the full 16b addresses

~Bryan