[PATCH 1/4] imx: Add support for Kontron i.MX8MP OSM-S SoM and BL carrier board
Frieder Schrempf
frieder at fris.de
Tue Nov 11 11:28:10 CET 2025
From: Frieder Schrempf <frieder.schrempf at kontron.de>
This adds support for the Kontron Electronics OSM-S i.MX8MP SoM
and the matching baseboard BL i.MX8MP.
The SoM hardware complies to the Open Standard Module (OSM) 1.1
specification, size S (https://sget.org/standards/osm).
Signed-off-by: Frieder Schrempf <frieder.schrempf at kontron.de>
---
.../dts/imx8mp-kontron-bl-osm-s-u-boot.dtsi | 115 +
arch/arm/mach-imx/imx8m/Kconfig | 14 +
board/kontron/osm-s-mx8mp/Kconfig | 17 +
board/kontron/osm-s-mx8mp/MAINTAINERS | 7 +
board/kontron/osm-s-mx8mp/Makefile | 9 +
board/kontron/osm-s-mx8mp/imximage.cfg | 8 +
board/kontron/osm-s-mx8mp/lpddr4_timing.c | 2474 +++++++++++++++++
board/kontron/osm-s-mx8mp/osm-s-mx8mp.c | 175 ++
board/kontron/osm-s-mx8mp/osm-s-mx8mp.env | 6 +
board/kontron/osm-s-mx8mp/spl.c | 358 +++
configs/kontron-osm-s-mx8mp.config | 203 ++
configs/kontron-osm-s-mx8mp_defconfig | 3 +
doc/board/kontron/index.rst | 1 +
doc/board/kontron/osm-s-mx8mp.rst | 104 +
include/configs/kontron-osm-s-mx8mp.h | 30 +
15 files changed, 3524 insertions(+)
create mode 100644 arch/arm/dts/imx8mp-kontron-bl-osm-s-u-boot.dtsi
create mode 100644 board/kontron/osm-s-mx8mp/Kconfig
create mode 100644 board/kontron/osm-s-mx8mp/MAINTAINERS
create mode 100644 board/kontron/osm-s-mx8mp/Makefile
create mode 100644 board/kontron/osm-s-mx8mp/imximage.cfg
create mode 100644 board/kontron/osm-s-mx8mp/lpddr4_timing.c
create mode 100644 board/kontron/osm-s-mx8mp/osm-s-mx8mp.c
create mode 100644 board/kontron/osm-s-mx8mp/osm-s-mx8mp.env
create mode 100644 board/kontron/osm-s-mx8mp/spl.c
create mode 100644 configs/kontron-osm-s-mx8mp.config
create mode 100644 configs/kontron-osm-s-mx8mp_defconfig
create mode 100644 doc/board/kontron/osm-s-mx8mp.rst
create mode 100644 include/configs/kontron-osm-s-mx8mp.h
diff --git a/arch/arm/dts/imx8mp-kontron-bl-osm-s-u-boot.dtsi b/arch/arm/dts/imx8mp-kontron-bl-osm-s-u-boot.dtsi
new file mode 100644
index 00000000000..6304b7e7169
--- /dev/null
+++ b/arch/arm/dts/imx8mp-kontron-bl-osm-s-u-boot.dtsi
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright (C) 2022 Kontron Electronics GmbH
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ bootph-pre-ram;
+ };
+};
+
+&gpio1 {
+ bootph-pre-ram;
+};
+
+&gpio2 {
+ bootph-pre-ram;
+};
+
+&gpio3 {
+ bootph-pre-ram;
+};
+
+&gpio4 {
+ bootph-pre-ram;
+};
+
+&gpio5 {
+ bootph-pre-ram;
+};
+
+/* Enable I2C1 to probe for a touch controller on LVDS connector */
+&i2c1 {
+ status = "okay";
+};
+
+&i2c5 {
+ bootph-pre-ram;
+};
+
+&pinctrl_i2c5 {
+ bootph-pre-ram;
+};
+
+&pinctrl_i2c5_gpio {
+ bootph-pre-ram;
+};
+
+&pinctrl_pmic {
+ bootph-pre-ram;
+};
+
+&pinctrl_uart3 {
+ bootph-pre-ram;
+};
+
+&pinctrl_wdog {
+ bootph-pre-ram;
+};
+
+&pca9450 {
+ bootph-pre-ram;
+};
+
+®_vdd_soc {
+ bootph-pre-ram;
+};
+
+®_vdd_arm {
+ bootph-pre-ram;
+};
+
+®_vdd_3v3 {
+ bootph-pre-ram;
+};
+
+®_vdd_1v8 {
+ bootph-pre-ram;
+};
+
+®_nvcc_dram {
+ bootph-pre-ram;
+};
+
+®_nvcc_snvs {
+ bootph-pre-ram;
+};
+
+®_vdda {
+ bootph-pre-ram;
+};
+
+®_nvcc_sd {
+ bootph-pre-ram;
+};
+
+&uart3 {
+ bootph-pre-ram;
+};
+
+&usb_dwc3_0 {
+ /*
+ * OTG role switching is currently not supported in U-Boot, use peripheral
+ * as default.
+ */
+ dr_mode = "peripheral";
+};
+
+&wdog1 {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 030ed2f0633..1dea8a466a6 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -158,6 +158,19 @@ config TARGET_KONTRON_MX8MM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+config TARGET_KONTRON_MX8MP
+ bool "Kontron OSM-S/BL i.MX8MP"
+ select BINMAN
+ select IMX8MP
+ select SUPPORT_SPL
+ select IMX8M_LPDDR4
+ select FSL_CAAM
+ select ARCH_MISC_INIT
+ select SPL_CRYPTO if SPL
+ help
+ Kontron Electronics BL i.MX8MP using SoM module conformant to OSM
+ standard 1.1 size S.
+
config TARGET_IMX8MN_BSH_SMM_S2
bool "imx8mn-bsh-smm-s2"
select IMX8MN
@@ -434,6 +447,7 @@ source "board/freescale/imx8mn_evk/Kconfig"
source "board/freescale/imx8mp_evk/Kconfig"
source "board/gateworks/venice/Kconfig"
source "board/google/imx8mq_phanbell/Kconfig"
+source "board/kontron/osm-s-mx8mp/Kconfig"
source "board/kontron/pitx_imx8m/Kconfig"
source "board/kontron/sl-mx8mm/Kconfig"
source "board/menlo/mx8menlo/Kconfig"
diff --git a/board/kontron/osm-s-mx8mp/Kconfig b/board/kontron/osm-s-mx8mp/Kconfig
new file mode 100644
index 00000000000..36da92fed54
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/Kconfig
@@ -0,0 +1,17 @@
+if TARGET_KONTRON_MX8MP
+
+config SYS_BOARD
+ string
+ default "osm-s-mx8mp"
+
+config SYS_VENDOR
+ string
+ default "kontron"
+
+config SYS_CONFIG_NAME
+ string
+ default "kontron-osm-s-mx8mp"
+
+source "board/kontron/common/Kconfig"
+
+endif
diff --git a/board/kontron/osm-s-mx8mp/MAINTAINERS b/board/kontron/osm-s-mx8mp/MAINTAINERS
new file mode 100644
index 00000000000..adf94e4f92a
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/MAINTAINERS
@@ -0,0 +1,7 @@
+Kontron OSM-S/BL i.MX8M Plus Boards
+M: Frieder Schrempf <frieder.schrempf at kontron.de>
+S: Maintained
+F: board/kontron/osm-s-mx8mp
+F: configs/kontron-osm-s-mx8mp_defconfig
+F: doc/board/kontron/osm-s-mx8mp.rst
+F: include/configs/kontron-osm-s-mx8mp.h
diff --git a/board/kontron/osm-s-mx8mp/Makefile b/board/kontron/osm-s-mx8mp/Makefile
new file mode 100644
index 00000000000..0b688635038
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+# (C) Copyright 2023 Kontron Electronics GmbH
+
+obj-y := osm-s-mx8mp.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/kontron/osm-s-mx8mp/imximage.cfg b/board/kontron/osm-s-mx8mp/imximage.cfg
new file mode 100644
index 00000000000..576cc5b3181
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/imximage.cfg
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Kontron Electronics GmbH
+ */
+
+ROM_VERSION v2
+BOOT_FROM sd
+LOADER u-boot-spl-ddr.bin 0x920000
diff --git a/board/kontron/osm-s-mx8mp/lpddr4_timing.c b/board/kontron/osm-s-mx8mp/lpddr4_timing.c
new file mode 100644
index 00000000000..f69873e8312
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/lpddr4_timing.c
@@ -0,0 +1,2474 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Kontron Electronics GmbH
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+struct dram_cfg_param ddr_ddrc_cfg[] = {
+ /** Initialize DDRC registers **/
+ { 0x3d400304, 0x1 },
+ { 0x3d400030, 0x1 },
+ { 0x3d400000, 0xa3080020 },
+ { 0x3d400020, 0x1323 },
+ { 0x3d400024, 0x1e84800 },
+ { 0x3d400064, 0x7a017c },
+ { 0x3d400070, 0x7027f90 },
+ { 0x3d400074, 0x790 },
+ { 0x3d4000d0, 0xc00307a3 },
+ { 0x3d4000d4, 0xc50000 },
+ { 0x3d4000dc, 0xf4003f },
+ { 0x3d4000e0, 0xeb0000 },
+ { 0x3d4000e8, 0x530048 },
+ { 0x3d4000ec, 0x14002f },
+ { 0x3d400100, 0x2028222a },
+ { 0x3d400104, 0x8083f },
+ { 0x3d40010c, 0xe0e000 },
+ { 0x3d400110, 0x12040a12 },
+ { 0x3d400114, 0x2050f0f },
+ { 0x3d400118, 0x1010009 },
+ { 0x3d40011c, 0x502 },
+ { 0x3d400130, 0x20800 },
+ { 0x3d400134, 0xe100002 },
+ { 0x3d400138, 0x184 },
+ { 0x3d400144, 0xc80064 },
+ { 0x3d400180, 0x3e8001e },
+ { 0x3d400184, 0x3207a12 },
+ { 0x3d400188, 0x0 },
+ { 0x3d400190, 0x4a3820e },
+ { 0x3d400194, 0x80303 },
+ { 0x3d4001b4, 0x230e },
+ { 0x3d4001a0, 0xe0400018 },
+ { 0x3d4001a4, 0xdf00e4 },
+ { 0x3d4001a8, 0x80000000 },
+ { 0x3d4001b0, 0x11 },
+ { 0x3d4001c0, 0x7 },
+ { 0x3d4001c4, 0x1 },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9141d1c },
+ { 0x3d400200, 0x18 },
+ { 0x3d400208, 0x0 },
+ { 0x3d40020c, 0x0 },
+ { 0x3d400210, 0x1f1f },
+ { 0x3d400204, 0x80808 },
+ { 0x3d400214, 0x7070707 },
+ { 0x3d400218, 0x7070707 },
+ { 0x3d40021c, 0xf07 },
+ { 0x3d400250, 0x1705 },
+ { 0x3d400254, 0x2c },
+ { 0x3d40025c, 0x4000030 },
+ { 0x3d400264, 0x900093e7 },
+ { 0x3d40026c, 0x2005574 },
+ { 0x3d400400, 0x111 },
+ { 0x3d400404, 0x72ff },
+ { 0x3d400408, 0x72ff },
+ { 0x3d400494, 0x2100e07 },
+ { 0x3d400498, 0x620096 },
+ { 0x3d40049c, 0x1100e07 },
+ { 0x3d4004a0, 0xc8012c },
+ { 0x3d402020, 0x1021 },
+ { 0x3d402024, 0x30d400 },
+ { 0x3d402050, 0x20d000 },
+ { 0x3d402064, 0xc0026 },
+ { 0x3d4020dc, 0x840000 },
+ { 0x3d4020e0, 0xf30000 },
+ { 0x3d4020e8, 0x660048 },
+ { 0x3d4020ec, 0x16002f },
+ { 0x3d402100, 0xa040305 },
+ { 0x3d402104, 0x30407 },
+ { 0x3d402108, 0x203060b },
+ { 0x3d40210c, 0x505000 },
+ { 0x3d402110, 0x2040202 },
+ { 0x3d402114, 0x2030202 },
+ { 0x3d402118, 0x1010004 },
+ { 0x3d40211c, 0x302 },
+ { 0x3d402130, 0x20300 },
+ { 0x3d402134, 0xa100002 },
+ { 0x3d402138, 0x27 },
+ { 0x3d402144, 0x14000a },
+ { 0x3d402180, 0x640004 },
+ { 0x3d402190, 0x3818200 },
+ { 0x3d402194, 0x80303 },
+ { 0x3d4021b4, 0x100 },
+ { 0x3d4020f4, 0x599 },
+ { 0x3d403020, 0x1021 },
+ { 0x3d403024, 0xc3500 },
+ { 0x3d403050, 0x20d000 },
+ { 0x3d403064, 0x3000a },
+ { 0x3d4030dc, 0x840000 },
+ { 0x3d4030e0, 0xf30000 },
+ { 0x3d4030e8, 0x660048 },
+ { 0x3d4030ec, 0x16002f },
+ { 0x3d403100, 0xa010102 },
+ { 0x3d403104, 0x30404 },
+ { 0x3d403108, 0x203060b },
+ { 0x3d40310c, 0x505000 },
+ { 0x3d403110, 0x2040202 },
+ { 0x3d403114, 0x2030202 },
+ { 0x3d403118, 0x1010004 },
+ { 0x3d40311c, 0x302 },
+ { 0x3d403130, 0x20300 },
+ { 0x3d403134, 0xa100002 },
+ { 0x3d403138, 0xa },
+ { 0x3d403144, 0x50003 },
+ { 0x3d403180, 0x190004 },
+ { 0x3d403190, 0x3818200 },
+ { 0x3d403194, 0x80303 },
+ { 0x3d4031b4, 0x100 },
+ { 0x3d4030f4, 0x599 },
+ { 0x3d400028, 0x0 },
+};
+
+/* PHY Initialize Configuration */
+struct dram_cfg_param ddr_ddrphy_cfg[] = {
+ { 0x100a0, 0x0 },
+ { 0x100a1, 0x1 },
+ { 0x100a2, 0x2 },
+ { 0x100a3, 0x3 },
+ { 0x100a4, 0x4 },
+ { 0x100a5, 0x5 },
+ { 0x100a6, 0x6 },
+ { 0x100a7, 0x7 },
+ { 0x110a0, 0x0 },
+ { 0x110a1, 0x1 },
+ { 0x110a2, 0x3 },
+ { 0x110a3, 0x4 },
+ { 0x110a4, 0x5 },
+ { 0x110a5, 0x2 },
+ { 0x110a6, 0x7 },
+ { 0x110a7, 0x6 },
+ { 0x120a0, 0x0 },
+ { 0x120a1, 0x1 },
+ { 0x120a2, 0x3 },
+ { 0x120a3, 0x2 },
+ { 0x120a4, 0x5 },
+ { 0x120a5, 0x4 },
+ { 0x120a6, 0x7 },
+ { 0x120a7, 0x6 },
+ { 0x130a0, 0x0 },
+ { 0x130a1, 0x1 },
+ { 0x130a2, 0x2 },
+ { 0x130a3, 0x3 },
+ { 0x130a4, 0x4 },
+ { 0x130a5, 0x5 },
+ { 0x130a6, 0x6 },
+ { 0x130a7, 0x7 },
+ { 0x1005f, 0x1ff },
+ { 0x1015f, 0x1ff },
+ { 0x1105f, 0x1ff },
+ { 0x1115f, 0x1ff },
+ { 0x1205f, 0x1ff },
+ { 0x1215f, 0x1ff },
+ { 0x1305f, 0x1ff },
+ { 0x1315f, 0x1ff },
+ { 0x11005f, 0x1ff },
+ { 0x11015f, 0x1ff },
+ { 0x11105f, 0x1ff },
+ { 0x11115f, 0x1ff },
+ { 0x11205f, 0x1ff },
+ { 0x11215f, 0x1ff },
+ { 0x11305f, 0x1ff },
+ { 0x11315f, 0x1ff },
+ { 0x21005f, 0x1ff },
+ { 0x21015f, 0x1ff },
+ { 0x21105f, 0x1ff },
+ { 0x21115f, 0x1ff },
+ { 0x21205f, 0x1ff },
+ { 0x21215f, 0x1ff },
+ { 0x21305f, 0x1ff },
+ { 0x21315f, 0x1ff },
+ { 0x55, 0x1ff },
+ { 0x1055, 0x1ff },
+ { 0x2055, 0x1ff },
+ { 0x3055, 0x1ff },
+ { 0x4055, 0x1ff },
+ { 0x5055, 0x1ff },
+ { 0x6055, 0x1ff },
+ { 0x7055, 0x1ff },
+ { 0x8055, 0x1ff },
+ { 0x9055, 0x1ff },
+ { 0x200c5, 0x18 },
+ { 0x1200c5, 0x7 },
+ { 0x2200c5, 0x7 },
+ { 0x2002e, 0x2 },
+ { 0x12002e, 0x2 },
+ { 0x22002e, 0x2 },
+ { 0x90204, 0x0 },
+ { 0x190204, 0x0 },
+ { 0x290204, 0x0 },
+ { 0x20024, 0x1a3 },
+ { 0x2003a, 0x2 },
+ { 0x2007d, 0x212 },
+ { 0x2007c, 0x61 },
+ { 0x120024, 0x1a3 },
+ { 0x2003a, 0x2 },
+ { 0x12007d, 0x212 },
+ { 0x12007c, 0x61 },
+ { 0x220024, 0x1a3 },
+ { 0x2003a, 0x2 },
+ { 0x22007d, 0x212 },
+ { 0x22007c, 0x61 },
+ { 0x20056, 0x3 },
+ { 0x120056, 0x3 },
+ { 0x220056, 0x3 },
+ { 0x1004d, 0x600 },
+ { 0x1014d, 0x600 },
+ { 0x1104d, 0x600 },
+ { 0x1114d, 0x600 },
+ { 0x1204d, 0x600 },
+ { 0x1214d, 0x600 },
+ { 0x1304d, 0x600 },
+ { 0x1314d, 0x600 },
+ { 0x11004d, 0x600 },
+ { 0x11014d, 0x600 },
+ { 0x11104d, 0x600 },
+ { 0x11114d, 0x600 },
+ { 0x11204d, 0x600 },
+ { 0x11214d, 0x600 },
+ { 0x11304d, 0x600 },
+ { 0x11314d, 0x600 },
+ { 0x21004d, 0x600 },
+ { 0x21014d, 0x600 },
+ { 0x21104d, 0x600 },
+ { 0x21114d, 0x600 },
+ { 0x21204d, 0x600 },
+ { 0x21214d, 0x600 },
+ { 0x21304d, 0x600 },
+ { 0x21314d, 0x600 },
+ { 0x10049, 0x69a },
+ { 0x10149, 0x69a },
+ { 0x11049, 0x69a },
+ { 0x11149, 0x69a },
+ { 0x12049, 0x69a },
+ { 0x12149, 0x69a },
+ { 0x13049, 0x69a },
+ { 0x13149, 0x69a },
+ { 0x110049, 0x69a },
+ { 0x110149, 0x69a },
+ { 0x111049, 0x69a },
+ { 0x111149, 0x69a },
+ { 0x112049, 0x69a },
+ { 0x112149, 0x69a },
+ { 0x113049, 0x69a },
+ { 0x113149, 0x69a },
+ { 0x210049, 0x69a },
+ { 0x210149, 0x69a },
+ { 0x211049, 0x69a },
+ { 0x211149, 0x69a },
+ { 0x212049, 0x69a },
+ { 0x212149, 0x69a },
+ { 0x213049, 0x69a },
+ { 0x213149, 0x69a },
+ { 0x43, 0x63 },
+ { 0x1043, 0x63 },
+ { 0x2043, 0x63 },
+ { 0x3043, 0x63 },
+ { 0x4043, 0x63 },
+ { 0x5043, 0x63 },
+ { 0x6043, 0x63 },
+ { 0x7043, 0x63 },
+ { 0x8043, 0x63 },
+ { 0x9043, 0x63 },
+ { 0x20018, 0x3 },
+ { 0x20075, 0x4 },
+ { 0x20050, 0x0 },
+ { 0x20008, 0x3e8 },
+ { 0x120008, 0x64 },
+ { 0x220008, 0x19 },
+ { 0x20088, 0x9 },
+ { 0x200b2, 0x104 },
+ { 0x10043, 0x5a1 },
+ { 0x10143, 0x5a1 },
+ { 0x11043, 0x5a1 },
+ { 0x11143, 0x5a1 },
+ { 0x12043, 0x5a1 },
+ { 0x12143, 0x5a1 },
+ { 0x13043, 0x5a1 },
+ { 0x13143, 0x5a1 },
+ { 0x1200b2, 0x104 },
+ { 0x110043, 0x5a1 },
+ { 0x110143, 0x5a1 },
+ { 0x111043, 0x5a1 },
+ { 0x111143, 0x5a1 },
+ { 0x112043, 0x5a1 },
+ { 0x112143, 0x5a1 },
+ { 0x113043, 0x5a1 },
+ { 0x113143, 0x5a1 },
+ { 0x2200b2, 0x104 },
+ { 0x210043, 0x5a1 },
+ { 0x210143, 0x5a1 },
+ { 0x211043, 0x5a1 },
+ { 0x211143, 0x5a1 },
+ { 0x212043, 0x5a1 },
+ { 0x212143, 0x5a1 },
+ { 0x213043, 0x5a1 },
+ { 0x213143, 0x5a1 },
+ { 0x200fa, 0x1 },
+ { 0x1200fa, 0x1 },
+ { 0x2200fa, 0x1 },
+ { 0x20019, 0x1 },
+ { 0x120019, 0x1 },
+ { 0x220019, 0x1 },
+ { 0x200f0, 0x660 },
+ { 0x200f1, 0x0 },
+ { 0x200f2, 0x4444 },
+ { 0x200f3, 0x8888 },
+ { 0x200f4, 0x5665 },
+ { 0x200f5, 0x0 },
+ { 0x200f6, 0x0 },
+ { 0x200f7, 0xf000 },
+ { 0x20025, 0x0 },
+ { 0x2002d, 0x1 },
+ { 0x12002d, 0x0 },
+ { 0x22002d, 0x0 },
+ { 0x2002c, 0x0 },
+};
+
+/* ddr phy trained csr */
+struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+ { 0x1005f, 0x0 },
+ { 0x1015f, 0x0 },
+ { 0x1105f, 0x0 },
+ { 0x1115f, 0x0 },
+ { 0x1205f, 0x0 },
+ { 0x1215f, 0x0 },
+ { 0x1305f, 0x0 },
+ { 0x1315f, 0x0 },
+ { 0x11005f, 0x0 },
+ { 0x11015f, 0x0 },
+ { 0x11105f, 0x0 },
+ { 0x11115f, 0x0 },
+ { 0x11205f, 0x0 },
+ { 0x11215f, 0x0 },
+ { 0x11305f, 0x0 },
+ { 0x11315f, 0x0 },
+ { 0x21005f, 0x0 },
+ { 0x21015f, 0x0 },
+ { 0x21105f, 0x0 },
+ { 0x21115f, 0x0 },
+ { 0x21205f, 0x0 },
+ { 0x21215f, 0x0 },
+ { 0x21305f, 0x0 },
+ { 0x21315f, 0x0 },
+ { 0x55, 0x0 },
+ { 0x1055, 0x0 },
+ { 0x2055, 0x0 },
+ { 0x3055, 0x0 },
+ { 0x4055, 0x0 },
+ { 0x5055, 0x0 },
+ { 0x6055, 0x0 },
+ { 0x7055, 0x0 },
+ { 0x8055, 0x0 },
+ { 0x9055, 0x0 },
+ { 0x200c5, 0x0 },
+ { 0x1200c5, 0x0 },
+ { 0x2200c5, 0x0 },
+ { 0x2002e, 0x0 },
+ { 0x12002e, 0x0 },
+ { 0x22002e, 0x0 },
+ { 0x90204, 0x0 },
+ { 0x190204, 0x0 },
+ { 0x290204, 0x0 },
+ { 0x20024, 0x0 },
+ { 0x2003a, 0x0 },
+ { 0x2007d, 0x0 },
+ { 0x2007c, 0x0 },
+ { 0x120024, 0x0 },
+ { 0x12007d, 0x0 },
+ { 0x12007c, 0x0 },
+ { 0x220024, 0x0 },
+ { 0x22007d, 0x0 },
+ { 0x22007c, 0x0 },
+ { 0x20056, 0x0 },
+ { 0x120056, 0x0 },
+ { 0x220056, 0x0 },
+ { 0x1004d, 0x0 },
+ { 0x1014d, 0x0 },
+ { 0x1104d, 0x0 },
+ { 0x1114d, 0x0 },
+ { 0x1204d, 0x0 },
+ { 0x1214d, 0x0 },
+ { 0x1304d, 0x0 },
+ { 0x1314d, 0x0 },
+ { 0x11004d, 0x0 },
+ { 0x11014d, 0x0 },
+ { 0x11104d, 0x0 },
+ { 0x11114d, 0x0 },
+ { 0x11204d, 0x0 },
+ { 0x11214d, 0x0 },
+ { 0x11304d, 0x0 },
+ { 0x11314d, 0x0 },
+ { 0x21004d, 0x0 },
+ { 0x21014d, 0x0 },
+ { 0x21104d, 0x0 },
+ { 0x21114d, 0x0 },
+ { 0x21204d, 0x0 },
+ { 0x21214d, 0x0 },
+ { 0x21304d, 0x0 },
+ { 0x21314d, 0x0 },
+ { 0x10049, 0x0 },
+ { 0x10149, 0x0 },
+ { 0x11049, 0x0 },
+ { 0x11149, 0x0 },
+ { 0x12049, 0x0 },
+ { 0x12149, 0x0 },
+ { 0x13049, 0x0 },
+ { 0x13149, 0x0 },
+ { 0x110049, 0x0 },
+ { 0x110149, 0x0 },
+ { 0x111049, 0x0 },
+ { 0x111149, 0x0 },
+ { 0x112049, 0x0 },
+ { 0x112149, 0x0 },
+ { 0x113049, 0x0 },
+ { 0x113149, 0x0 },
+ { 0x210049, 0x0 },
+ { 0x210149, 0x0 },
+ { 0x211049, 0x0 },
+ { 0x211149, 0x0 },
+ { 0x212049, 0x0 },
+ { 0x212149, 0x0 },
+ { 0x213049, 0x0 },
+ { 0x213149, 0x0 },
+ { 0x43, 0x0 },
+ { 0x1043, 0x0 },
+ { 0x2043, 0x0 },
+ { 0x3043, 0x0 },
+ { 0x4043, 0x0 },
+ { 0x5043, 0x0 },
+ { 0x6043, 0x0 },
+ { 0x7043, 0x0 },
+ { 0x8043, 0x0 },
+ { 0x9043, 0x0 },
+ { 0x20018, 0x0 },
+ { 0x20075, 0x0 },
+ { 0x20050, 0x0 },
+ { 0x20008, 0x0 },
+ { 0x120008, 0x0 },
+ { 0x220008, 0x0 },
+ { 0x20088, 0x0 },
+ { 0x200b2, 0x0 },
+ { 0x10043, 0x0 },
+ { 0x10143, 0x0 },
+ { 0x11043, 0x0 },
+ { 0x11143, 0x0 },
+ { 0x12043, 0x0 },
+ { 0x12143, 0x0 },
+ { 0x13043, 0x0 },
+ { 0x13143, 0x0 },
+ { 0x1200b2, 0x0 },
+ { 0x110043, 0x0 },
+ { 0x110143, 0x0 },
+ { 0x111043, 0x0 },
+ { 0x111143, 0x0 },
+ { 0x112043, 0x0 },
+ { 0x112143, 0x0 },
+ { 0x113043, 0x0 },
+ { 0x113143, 0x0 },
+ { 0x2200b2, 0x0 },
+ { 0x210043, 0x0 },
+ { 0x210143, 0x0 },
+ { 0x211043, 0x0 },
+ { 0x211143, 0x0 },
+ { 0x212043, 0x0 },
+ { 0x212143, 0x0 },
+ { 0x213043, 0x0 },
+ { 0x213143, 0x0 },
+ { 0x200fa, 0x0 },
+ { 0x1200fa, 0x0 },
+ { 0x2200fa, 0x0 },
+ { 0x20019, 0x0 },
+ { 0x120019, 0x0 },
+ { 0x220019, 0x0 },
+ { 0x200f0, 0x0 },
+ { 0x200f1, 0x0 },
+ { 0x200f2, 0x0 },
+ { 0x200f3, 0x0 },
+ { 0x200f4, 0x0 },
+ { 0x200f5, 0x0 },
+ { 0x200f6, 0x0 },
+ { 0x200f7, 0x0 },
+ { 0x20025, 0x0 },
+ { 0x2002d, 0x0 },
+ { 0x12002d, 0x0 },
+ { 0x22002d, 0x0 },
+ { 0x2002c, 0x0 },
+ { 0xd0000, 0x0 },
+ { 0x90000, 0x0 },
+ { 0x90001, 0x0 },
+ { 0x90002, 0x0 },
+ { 0x90003, 0x0 },
+ { 0x90004, 0x0 },
+ { 0x90005, 0x0 },
+ { 0x90029, 0x0 },
+ { 0x9002a, 0x0 },
+ { 0x9002b, 0x0 },
+ { 0x9002c, 0x0 },
+ { 0x9002d, 0x0 },
+ { 0x9002e, 0x0 },
+ { 0x9002f, 0x0 },
+ { 0x90030, 0x0 },
+ { 0x90031, 0x0 },
+ { 0x90032, 0x0 },
+ { 0x90033, 0x0 },
+ { 0x90034, 0x0 },
+ { 0x90035, 0x0 },
+ { 0x90036, 0x0 },
+ { 0x90037, 0x0 },
+ { 0x90038, 0x0 },
+ { 0x90039, 0x0 },
+ { 0x9003a, 0x0 },
+ { 0x9003b, 0x0 },
+ { 0x9003c, 0x0 },
+ { 0x9003d, 0x0 },
+ { 0x9003e, 0x0 },
+ { 0x9003f, 0x0 },
+ { 0x90040, 0x0 },
+ { 0x90041, 0x0 },
+ { 0x90042, 0x0 },
+ { 0x90043, 0x0 },
+ { 0x90044, 0x0 },
+ { 0x90045, 0x0 },
+ { 0x90046, 0x0 },
+ { 0x90047, 0x0 },
+ { 0x90048, 0x0 },
+ { 0x90049, 0x0 },
+ { 0x9004a, 0x0 },
+ { 0x9004b, 0x0 },
+ { 0x9004c, 0x0 },
+ { 0x9004d, 0x0 },
+ { 0x9004e, 0x0 },
+ { 0x9004f, 0x0 },
+ { 0x90050, 0x0 },
+ { 0x90051, 0x0 },
+ { 0x90052, 0x0 },
+ { 0x90053, 0x0 },
+ { 0x90054, 0x0 },
+ { 0x90055, 0x0 },
+ { 0x90056, 0x0 },
+ { 0x90057, 0x0 },
+ { 0x90058, 0x0 },
+ { 0x90059, 0x0 },
+ { 0x9005a, 0x0 },
+ { 0x9005b, 0x0 },
+ { 0x9005c, 0x0 },
+ { 0x9005d, 0x0 },
+ { 0x9005e, 0x0 },
+ { 0x9005f, 0x0 },
+ { 0x90060, 0x0 },
+ { 0x90061, 0x0 },
+ { 0x90062, 0x0 },
+ { 0x90063, 0x0 },
+ { 0x90064, 0x0 },
+ { 0x90065, 0x0 },
+ { 0x90066, 0x0 },
+ { 0x90067, 0x0 },
+ { 0x90068, 0x0 },
+ { 0x90069, 0x0 },
+ { 0x9006a, 0x0 },
+ { 0x9006b, 0x0 },
+ { 0x9006c, 0x0 },
+ { 0x9006d, 0x0 },
+ { 0x9006e, 0x0 },
+ { 0x9006f, 0x0 },
+ { 0x90070, 0x0 },
+ { 0x90071, 0x0 },
+ { 0x90072, 0x0 },
+ { 0x90073, 0x0 },
+ { 0x90074, 0x0 },
+ { 0x90075, 0x0 },
+ { 0x90076, 0x0 },
+ { 0x90077, 0x0 },
+ { 0x90078, 0x0 },
+ { 0x90079, 0x0 },
+ { 0x9007a, 0x0 },
+ { 0x9007b, 0x0 },
+ { 0x9007c, 0x0 },
+ { 0x9007d, 0x0 },
+ { 0x9007e, 0x0 },
+ { 0x9007f, 0x0 },
+ { 0x90080, 0x0 },
+ { 0x90081, 0x0 },
+ { 0x90082, 0x0 },
+ { 0x90083, 0x0 },
+ { 0x90084, 0x0 },
+ { 0x90085, 0x0 },
+ { 0x90086, 0x0 },
+ { 0x90087, 0x0 },
+ { 0x90088, 0x0 },
+ { 0x90089, 0x0 },
+ { 0x9008a, 0x0 },
+ { 0x9008b, 0x0 },
+ { 0x9008c, 0x0 },
+ { 0x9008d, 0x0 },
+ { 0x9008e, 0x0 },
+ { 0x9008f, 0x0 },
+ { 0x90090, 0x0 },
+ { 0x90091, 0x0 },
+ { 0x90092, 0x0 },
+ { 0x90093, 0x0 },
+ { 0x90094, 0x0 },
+ { 0x90095, 0x0 },
+ { 0x90096, 0x0 },
+ { 0x90097, 0x0 },
+ { 0x90098, 0x0 },
+ { 0x90099, 0x0 },
+ { 0x9009a, 0x0 },
+ { 0x9009b, 0x0 },
+ { 0x9009c, 0x0 },
+ { 0x9009d, 0x0 },
+ { 0x9009e, 0x0 },
+ { 0x9009f, 0x0 },
+ { 0x900a0, 0x0 },
+ { 0x900a1, 0x0 },
+ { 0x900a2, 0x0 },
+ { 0x900a3, 0x0 },
+ { 0x40000, 0x0 },
+ { 0x40020, 0x0 },
+ { 0x40040, 0x0 },
+ { 0x40060, 0x0 },
+ { 0x40001, 0x0 },
+ { 0x40021, 0x0 },
+ { 0x40041, 0x0 },
+ { 0x40061, 0x0 },
+ { 0x40002, 0x0 },
+ { 0x40022, 0x0 },
+ { 0x40042, 0x0 },
+ { 0x40062, 0x0 },
+ { 0x40003, 0x0 },
+ { 0x40023, 0x0 },
+ { 0x40043, 0x0 },
+ { 0x40063, 0x0 },
+ { 0x40004, 0x0 },
+ { 0x40024, 0x0 },
+ { 0x40044, 0x0 },
+ { 0x40064, 0x0 },
+ { 0x40005, 0x0 },
+ { 0x40025, 0x0 },
+ { 0x40045, 0x0 },
+ { 0x40065, 0x0 },
+ { 0x40006, 0x0 },
+ { 0x40026, 0x0 },
+ { 0x40046, 0x0 },
+ { 0x40066, 0x0 },
+ { 0x40007, 0x0 },
+ { 0x40027, 0x0 },
+ { 0x40047, 0x0 },
+ { 0x40067, 0x0 },
+ { 0x40008, 0x0 },
+ { 0x40028, 0x0 },
+ { 0x40048, 0x0 },
+ { 0x40068, 0x0 },
+ { 0x40009, 0x0 },
+ { 0x40029, 0x0 },
+ { 0x40049, 0x0 },
+ { 0x40069, 0x0 },
+ { 0x4000a, 0x0 },
+ { 0x4002a, 0x0 },
+ { 0x4004a, 0x0 },
+ { 0x4006a, 0x0 },
+ { 0x4000b, 0x0 },
+ { 0x4002b, 0x0 },
+ { 0x4004b, 0x0 },
+ { 0x4006b, 0x0 },
+ { 0x4000c, 0x0 },
+ { 0x4002c, 0x0 },
+ { 0x4004c, 0x0 },
+ { 0x4006c, 0x0 },
+ { 0x4000d, 0x0 },
+ { 0x4002d, 0x0 },
+ { 0x4004d, 0x0 },
+ { 0x4006d, 0x0 },
+ { 0x4000e, 0x0 },
+ { 0x4002e, 0x0 },
+ { 0x4004e, 0x0 },
+ { 0x4006e, 0x0 },
+ { 0x4000f, 0x0 },
+ { 0x4002f, 0x0 },
+ { 0x4004f, 0x0 },
+ { 0x4006f, 0x0 },
+ { 0x40010, 0x0 },
+ { 0x40030, 0x0 },
+ { 0x40050, 0x0 },
+ { 0x40070, 0x0 },
+ { 0x40011, 0x0 },
+ { 0x40031, 0x0 },
+ { 0x40051, 0x0 },
+ { 0x40071, 0x0 },
+ { 0x40012, 0x0 },
+ { 0x40032, 0x0 },
+ { 0x40052, 0x0 },
+ { 0x40072, 0x0 },
+ { 0x40013, 0x0 },
+ { 0x40033, 0x0 },
+ { 0x40053, 0x0 },
+ { 0x40073, 0x0 },
+ { 0x40014, 0x0 },
+ { 0x40034, 0x0 },
+ { 0x40054, 0x0 },
+ { 0x40074, 0x0 },
+ { 0x40015, 0x0 },
+ { 0x40035, 0x0 },
+ { 0x40055, 0x0 },
+ { 0x40075, 0x0 },
+ { 0x40016, 0x0 },
+ { 0x40036, 0x0 },
+ { 0x40056, 0x0 },
+ { 0x40076, 0x0 },
+ { 0x40017, 0x0 },
+ { 0x40037, 0x0 },
+ { 0x40057, 0x0 },
+ { 0x40077, 0x0 },
+ { 0x40018, 0x0 },
+ { 0x40038, 0x0 },
+ { 0x40058, 0x0 },
+ { 0x40078, 0x0 },
+ { 0x40019, 0x0 },
+ { 0x40039, 0x0 },
+ { 0x40059, 0x0 },
+ { 0x40079, 0x0 },
+ { 0x4001a, 0x0 },
+ { 0x4003a, 0x0 },
+ { 0x4005a, 0x0 },
+ { 0x4007a, 0x0 },
+ { 0x900a4, 0x0 },
+ { 0x900a5, 0x0 },
+ { 0x900a6, 0x0 },
+ { 0x900a7, 0x0 },
+ { 0x900a8, 0x0 },
+ { 0x900a9, 0x0 },
+ { 0x900aa, 0x0 },
+ { 0x900ab, 0x0 },
+ { 0x900ac, 0x0 },
+ { 0x900ad, 0x0 },
+ { 0x900ae, 0x0 },
+ { 0x900af, 0x0 },
+ { 0x900b0, 0x0 },
+ { 0x900b1, 0x0 },
+ { 0x900b2, 0x0 },
+ { 0x900b3, 0x0 },
+ { 0x900b4, 0x0 },
+ { 0x900b5, 0x0 },
+ { 0x900b6, 0x0 },
+ { 0x900b7, 0x0 },
+ { 0x900b8, 0x0 },
+ { 0x900b9, 0x0 },
+ { 0x900ba, 0x0 },
+ { 0x900bb, 0x0 },
+ { 0x900bc, 0x0 },
+ { 0x900bd, 0x0 },
+ { 0x900be, 0x0 },
+ { 0x900bf, 0x0 },
+ { 0x900c0, 0x0 },
+ { 0x900c1, 0x0 },
+ { 0x900c2, 0x0 },
+ { 0x900c3, 0x0 },
+ { 0x900c4, 0x0 },
+ { 0x900c5, 0x0 },
+ { 0x900c6, 0x0 },
+ { 0x900c7, 0x0 },
+ { 0x900c8, 0x0 },
+ { 0x900c9, 0x0 },
+ { 0x900ca, 0x0 },
+ { 0x900cb, 0x0 },
+ { 0x900cc, 0x0 },
+ { 0x900cd, 0x0 },
+ { 0x900ce, 0x0 },
+ { 0x900cf, 0x0 },
+ { 0x900d0, 0x0 },
+ { 0x900d1, 0x0 },
+ { 0x900d2, 0x0 },
+ { 0x900d3, 0x0 },
+ { 0x900d4, 0x0 },
+ { 0x900d5, 0x0 },
+ { 0x900d6, 0x0 },
+ { 0x900d7, 0x0 },
+ { 0x900d8, 0x0 },
+ { 0x900d9, 0x0 },
+ { 0x900da, 0x0 },
+ { 0x900db, 0x0 },
+ { 0x900dc, 0x0 },
+ { 0x900dd, 0x0 },
+ { 0x900de, 0x0 },
+ { 0x900df, 0x0 },
+ { 0x900e0, 0x0 },
+ { 0x900e1, 0x0 },
+ { 0x900e2, 0x0 },
+ { 0x900e3, 0x0 },
+ { 0x900e4, 0x0 },
+ { 0x900e5, 0x0 },
+ { 0x900e6, 0x0 },
+ { 0x900e7, 0x0 },
+ { 0x900e8, 0x0 },
+ { 0x900e9, 0x0 },
+ { 0x900ea, 0x0 },
+ { 0x900eb, 0x0 },
+ { 0x900ec, 0x0 },
+ { 0x900ed, 0x0 },
+ { 0x900ee, 0x0 },
+ { 0x900ef, 0x0 },
+ { 0x900f0, 0x0 },
+ { 0x900f1, 0x0 },
+ { 0x900f2, 0x0 },
+ { 0x900f3, 0x0 },
+ { 0x900f4, 0x0 },
+ { 0x900f5, 0x0 },
+ { 0x900f6, 0x0 },
+ { 0x900f7, 0x0 },
+ { 0x900f8, 0x0 },
+ { 0x900f9, 0x0 },
+ { 0x900fa, 0x0 },
+ { 0x900fb, 0x0 },
+ { 0x900fc, 0x0 },
+ { 0x900fd, 0x0 },
+ { 0x900fe, 0x0 },
+ { 0x900ff, 0x0 },
+ { 0x90100, 0x0 },
+ { 0x90101, 0x0 },
+ { 0x90102, 0x0 },
+ { 0x90103, 0x0 },
+ { 0x90104, 0x0 },
+ { 0x90105, 0x0 },
+ { 0x90106, 0x0 },
+ { 0x90107, 0x0 },
+ { 0x90108, 0x0 },
+ { 0x90109, 0x0 },
+ { 0x9010a, 0x0 },
+ { 0x9010b, 0x0 },
+ { 0x9010c, 0x0 },
+ { 0x9010d, 0x0 },
+ { 0x9010e, 0x0 },
+ { 0x9010f, 0x0 },
+ { 0x90110, 0x0 },
+ { 0x90111, 0x0 },
+ { 0x90112, 0x0 },
+ { 0x90113, 0x0 },
+ { 0x90114, 0x0 },
+ { 0x90115, 0x0 },
+ { 0x90116, 0x0 },
+ { 0x90117, 0x0 },
+ { 0x90118, 0x0 },
+ { 0x90119, 0x0 },
+ { 0x9011a, 0x0 },
+ { 0x9011b, 0x0 },
+ { 0x9011c, 0x0 },
+ { 0x9011d, 0x0 },
+ { 0x9011e, 0x0 },
+ { 0x9011f, 0x0 },
+ { 0x90120, 0x0 },
+ { 0x90121, 0x0 },
+ { 0x90122, 0x0 },
+ { 0x90123, 0x0 },
+ { 0x90124, 0x0 },
+ { 0x90125, 0x0 },
+ { 0x90126, 0x0 },
+ { 0x90127, 0x0 },
+ { 0x90128, 0x0 },
+ { 0x90129, 0x0 },
+ { 0x9012a, 0x0 },
+ { 0x9012b, 0x0 },
+ { 0x9012c, 0x0 },
+ { 0x9012d, 0x0 },
+ { 0x9012e, 0x0 },
+ { 0x9012f, 0x0 },
+ { 0x90130, 0x0 },
+ { 0x90131, 0x0 },
+ { 0x90132, 0x0 },
+ { 0x90133, 0x0 },
+ { 0x90134, 0x0 },
+ { 0x90135, 0x0 },
+ { 0x90136, 0x0 },
+ { 0x90137, 0x0 },
+ { 0x90138, 0x0 },
+ { 0x90139, 0x0 },
+ { 0x9013a, 0x0 },
+ { 0x9013b, 0x0 },
+ { 0x9013c, 0x0 },
+ { 0x9013d, 0x0 },
+ { 0x9013e, 0x0 },
+ { 0x9013f, 0x0 },
+ { 0x90140, 0x0 },
+ { 0x90141, 0x0 },
+ { 0x90142, 0x0 },
+ { 0x90143, 0x0 },
+ { 0x90144, 0x0 },
+ { 0x90145, 0x0 },
+ { 0x90146, 0x0 },
+ { 0x90147, 0x0 },
+ { 0x90148, 0x0 },
+ { 0x90149, 0x0 },
+ { 0x9014a, 0x0 },
+ { 0x9014b, 0x0 },
+ { 0x9014c, 0x0 },
+ { 0x9014d, 0x0 },
+ { 0x9014e, 0x0 },
+ { 0x9014f, 0x0 },
+ { 0x90150, 0x0 },
+ { 0x90151, 0x0 },
+ { 0x90152, 0x0 },
+ { 0x90153, 0x0 },
+ { 0x90154, 0x0 },
+ { 0x90155, 0x0 },
+ { 0x90156, 0x0 },
+ { 0x90157, 0x0 },
+ { 0x90158, 0x0 },
+ { 0x90159, 0x0 },
+ { 0x9015a, 0x0 },
+ { 0x9015b, 0x0 },
+ { 0x9015c, 0x0 },
+ { 0x9015d, 0x0 },
+ { 0x9015e, 0x0 },
+ { 0x9015f, 0x0 },
+ { 0x90160, 0x0 },
+ { 0x90161, 0x0 },
+ { 0x90162, 0x0 },
+ { 0x90163, 0x0 },
+ { 0x90164, 0x0 },
+ { 0x90165, 0x0 },
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+ { 0x2102c1, 0x0 },
+ { 0x2103c0, 0x0 },
+ { 0x2103c1, 0x0 },
+ { 0x2104c0, 0x0 },
+ { 0x2104c1, 0x0 },
+ { 0x2105c0, 0x0 },
+ { 0x2105c1, 0x0 },
+ { 0x2106c0, 0x0 },
+ { 0x2106c1, 0x0 },
+ { 0x2107c0, 0x0 },
+ { 0x2107c1, 0x0 },
+ { 0x2108c0, 0x0 },
+ { 0x2108c1, 0x0 },
+ { 0x2100ae, 0x0 },
+ { 0x2100af, 0x0 },
+ { 0x211020, 0x0 },
+ { 0x211080, 0x0 },
+ { 0x211081, 0x0 },
+ { 0x2110d0, 0x0 },
+ { 0x2110d1, 0x0 },
+ { 0x21108c, 0x0 },
+ { 0x21108d, 0x0 },
+ { 0x211180, 0x0 },
+ { 0x211181, 0x0 },
+ { 0x2111d0, 0x0 },
+ { 0x2111d1, 0x0 },
+ { 0x21118c, 0x0 },
+ { 0x21118d, 0x0 },
+ { 0x2110c0, 0x0 },
+ { 0x2110c1, 0x0 },
+ { 0x2111c0, 0x0 },
+ { 0x2111c1, 0x0 },
+ { 0x2112c0, 0x0 },
+ { 0x2112c1, 0x0 },
+ { 0x2113c0, 0x0 },
+ { 0x2113c1, 0x0 },
+ { 0x2114c0, 0x0 },
+ { 0x2114c1, 0x0 },
+ { 0x2115c0, 0x0 },
+ { 0x2115c1, 0x0 },
+ { 0x2116c0, 0x0 },
+ { 0x2116c1, 0x0 },
+ { 0x2117c0, 0x0 },
+ { 0x2117c1, 0x0 },
+ { 0x2118c0, 0x0 },
+ { 0x2118c1, 0x0 },
+ { 0x2110ae, 0x0 },
+ { 0x2110af, 0x0 },
+ { 0x212020, 0x0 },
+ { 0x212080, 0x0 },
+ { 0x212081, 0x0 },
+ { 0x2120d0, 0x0 },
+ { 0x2120d1, 0x0 },
+ { 0x21208c, 0x0 },
+ { 0x21208d, 0x0 },
+ { 0x212180, 0x0 },
+ { 0x212181, 0x0 },
+ { 0x2121d0, 0x0 },
+ { 0x2121d1, 0x0 },
+ { 0x21218c, 0x0 },
+ { 0x21218d, 0x0 },
+ { 0x2120c0, 0x0 },
+ { 0x2120c1, 0x0 },
+ { 0x2121c0, 0x0 },
+ { 0x2121c1, 0x0 },
+ { 0x2122c0, 0x0 },
+ { 0x2122c1, 0x0 },
+ { 0x2123c0, 0x0 },
+ { 0x2123c1, 0x0 },
+ { 0x2124c0, 0x0 },
+ { 0x2124c1, 0x0 },
+ { 0x2125c0, 0x0 },
+ { 0x2125c1, 0x0 },
+ { 0x2126c0, 0x0 },
+ { 0x2126c1, 0x0 },
+ { 0x2127c0, 0x0 },
+ { 0x2127c1, 0x0 },
+ { 0x2128c0, 0x0 },
+ { 0x2128c1, 0x0 },
+ { 0x2120ae, 0x0 },
+ { 0x2120af, 0x0 },
+ { 0x213020, 0x0 },
+ { 0x213080, 0x0 },
+ { 0x213081, 0x0 },
+ { 0x2130d0, 0x0 },
+ { 0x2130d1, 0x0 },
+ { 0x21308c, 0x0 },
+ { 0x21308d, 0x0 },
+ { 0x213180, 0x0 },
+ { 0x213181, 0x0 },
+ { 0x2131d0, 0x0 },
+ { 0x2131d1, 0x0 },
+ { 0x21318c, 0x0 },
+ { 0x21318d, 0x0 },
+ { 0x2130c0, 0x0 },
+ { 0x2130c1, 0x0 },
+ { 0x2131c0, 0x0 },
+ { 0x2131c1, 0x0 },
+ { 0x2132c0, 0x0 },
+ { 0x2132c1, 0x0 },
+ { 0x2133c0, 0x0 },
+ { 0x2133c1, 0x0 },
+ { 0x2134c0, 0x0 },
+ { 0x2134c1, 0x0 },
+ { 0x2135c0, 0x0 },
+ { 0x2135c1, 0x0 },
+ { 0x2136c0, 0x0 },
+ { 0x2136c1, 0x0 },
+ { 0x2137c0, 0x0 },
+ { 0x2137c1, 0x0 },
+ { 0x2138c0, 0x0 },
+ { 0x2138c1, 0x0 },
+ { 0x2130ae, 0x0 },
+ { 0x2130af, 0x0 },
+ { 0x290201, 0x0 },
+ { 0x290202, 0x0 },
+ { 0x290203, 0x0 },
+ { 0x290205, 0x0 },
+ { 0x290206, 0x0 },
+ { 0x290207, 0x0 },
+ { 0x290208, 0x0 },
+ { 0x220020, 0x0 },
+ { 0x20077, 0x0 },
+ { 0x20072, 0x0 },
+ { 0x20073, 0x0 },
+ { 0x400c0, 0x0 },
+ { 0x10040, 0x0 },
+ { 0x10140, 0x0 },
+ { 0x10240, 0x0 },
+ { 0x10340, 0x0 },
+ { 0x10440, 0x0 },
+ { 0x10540, 0x0 },
+ { 0x10640, 0x0 },
+ { 0x10740, 0x0 },
+ { 0x10840, 0x0 },
+ { 0x11040, 0x0 },
+ { 0x11140, 0x0 },
+ { 0x11240, 0x0 },
+ { 0x11340, 0x0 },
+ { 0x11440, 0x0 },
+ { 0x11540, 0x0 },
+ { 0x11640, 0x0 },
+ { 0x11740, 0x0 },
+ { 0x11840, 0x0 },
+ { 0x12040, 0x0 },
+ { 0x12140, 0x0 },
+ { 0x12240, 0x0 },
+ { 0x12340, 0x0 },
+ { 0x12440, 0x0 },
+ { 0x12540, 0x0 },
+ { 0x12640, 0x0 },
+ { 0x12740, 0x0 },
+ { 0x12840, 0x0 },
+ { 0x13040, 0x0 },
+ { 0x13140, 0x0 },
+ { 0x13240, 0x0 },
+ { 0x13340, 0x0 },
+ { 0x13440, 0x0 },
+ { 0x13540, 0x0 },
+ { 0x13640, 0x0 },
+ { 0x13740, 0x0 },
+ { 0x13840, 0x0 },
+};
+
+/* P0 message block parameter for training firmware */
+struct dram_cfg_param ddr_fsp0_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54003, 0xfa0 },
+ { 0x54004, 0x2 },
+ { 0x54005, 0x303c },
+ { 0x54006, 0x14 },
+ { 0x54008, 0x131f },
+ { 0x54009, 0xc8 },
+ { 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
+ { 0x54012, 0x310 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0xeb },
+ { 0x5401b, 0x4853 },
+ { 0x5401c, 0x2f00 },
+ { 0x5401e, 0x14 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0xeb },
+ { 0x54021, 0x4853 },
+ { 0x54022, 0x2f00 },
+ { 0x54024, 0x14 },
+ { 0x5402b, 0x1000 },
+ { 0x5402c, 0x3 },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0xeb3f },
+ { 0x54034, 0x5300 },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x2f },
+ { 0x54037, 0x1400 },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0xeb3f },
+ { 0x5403a, 0x5300 },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x2f },
+ { 0x5403d, 0x1400 },
+ { 0xd0000, 0x1}
+};
+
+/* P1 message block parameter for training firmware */
+struct dram_cfg_param ddr_fsp1_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54002, 0x101 },
+ { 0x54003, 0x190 },
+ { 0x54004, 0x2 },
+ { 0x54005, 0x303c },
+ { 0x54006, 0x14 },
+ { 0x54008, 0x121f },
+ { 0x54009, 0xc8 },
+ { 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
+ { 0x54012, 0x310 },
+ { 0x54019, 0x84 },
+ { 0x5401a, 0xf3 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x2f00 },
+ { 0x5401e, 0x16 },
+ { 0x5401f, 0x84 },
+ { 0x54020, 0xf3 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x2f00 },
+ { 0x54024, 0x16 },
+ { 0x5402b, 0x1000 },
+ { 0x5402c, 0x3 },
+ { 0x54032, 0x8400 },
+ { 0x54033, 0xf300 },
+ { 0x54034, 0x6600 },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x2f },
+ { 0x54037, 0x1600 },
+ { 0x54038, 0x8400 },
+ { 0x54039, 0xf300 },
+ { 0x5403a, 0x6600 },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x2f },
+ { 0x5403d, 0x1600 },
+ { 0xd0000, 0x1}
+};
+
+/* P2 message block parameter for training firmware */
+struct dram_cfg_param ddr_fsp2_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54002, 0x102 },
+ { 0x54003, 0x64 },
+ { 0x54004, 0x2 },
+ { 0x54005, 0x303c },
+ { 0x54006, 0x14 },
+ { 0x54008, 0x121f },
+ { 0x54009, 0xc8 },
+ { 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
+ { 0x54012, 0x310 },
+ { 0x54019, 0x84 },
+ { 0x5401a, 0xf3 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x2f00 },
+ { 0x5401e, 0x16 },
+ { 0x5401f, 0x84 },
+ { 0x54020, 0xf3 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x2f00 },
+ { 0x54024, 0x16 },
+ { 0x5402b, 0x1000 },
+ { 0x5402c, 0x3 },
+ { 0x54032, 0x8400 },
+ { 0x54033, 0xf300 },
+ { 0x54034, 0x6600 },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x2f },
+ { 0x54037, 0x1600 },
+ { 0x54038, 0x8400 },
+ { 0x54039, 0xf300 },
+ { 0x5403a, 0x6600 },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x2f },
+ { 0x5403d, 0x1600 },
+ { 0xd0000, 0x1}
+};
+
+/* P0 2D message block parameter for training firmware */
+struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54003, 0xfa0 },
+ { 0x54004, 0x2 },
+ { 0x54005, 0x303c },
+ { 0x54006, 0x14 },
+ { 0x54008, 0x61 },
+ { 0x54009, 0xc8 },
+ { 0x5400b, 0x2 },
+ { 0x5400d, 0x100 },
+ { 0x5400f, 0x100 },
+ { 0x54010, 0x1f7f },
+ { 0x54012, 0x310 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0xeb },
+ { 0x5401b, 0x4853 },
+ { 0x5401c, 0x2f00 },
+ { 0x5401e, 0x14 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0xeb },
+ { 0x54021, 0x4853 },
+ { 0x54022, 0x2f00 },
+ { 0x54024, 0x14 },
+ { 0x5402b, 0x1000 },
+ { 0x5402c, 0x3 },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0xeb3f },
+ { 0x54034, 0x5300 },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x2f },
+ { 0x54037, 0x1400 },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0xeb3f },
+ { 0x5403a, 0x5300 },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x2f },
+ { 0x5403d, 0x1400 },
+ { 0xd0000, 0x1}
+};
+
+/* DRAM PHY init engine image */
+struct dram_cfg_param ddr_phy_pie[] = {
+ { 0xd0000, 0x0 },
+ { 0x90000, 0x10 },
+ { 0x90001, 0x400 },
+ { 0x90002, 0x10e },
+ { 0x90003, 0x0 },
+ { 0x90004, 0x0 },
+ { 0x90005, 0x8 },
+ { 0x90029, 0xb },
+ { 0x9002a, 0x480 },
+ { 0x9002b, 0x109 },
+ { 0x9002c, 0x8 },
+ { 0x9002d, 0x448 },
+ { 0x9002e, 0x139 },
+ { 0x9002f, 0x8 },
+ { 0x90030, 0x478 },
+ { 0x90031, 0x109 },
+ { 0x90032, 0x0 },
+ { 0x90033, 0xe8 },
+ { 0x90034, 0x109 },
+ { 0x90035, 0x2 },
+ { 0x90036, 0x10 },
+ { 0x90037, 0x139 },
+ { 0x90038, 0xb },
+ { 0x90039, 0x7c0 },
+ { 0x9003a, 0x139 },
+ { 0x9003b, 0x44 },
+ { 0x9003c, 0x633 },
+ { 0x9003d, 0x159 },
+ { 0x9003e, 0x14f },
+ { 0x9003f, 0x630 },
+ { 0x90040, 0x159 },
+ { 0x90041, 0x47 },
+ { 0x90042, 0x633 },
+ { 0x90043, 0x149 },
+ { 0x90044, 0x4f },
+ { 0x90045, 0x633 },
+ { 0x90046, 0x179 },
+ { 0x90047, 0x8 },
+ { 0x90048, 0xe0 },
+ { 0x90049, 0x109 },
+ { 0x9004a, 0x0 },
+ { 0x9004b, 0x7c8 },
+ { 0x9004c, 0x109 },
+ { 0x9004d, 0x0 },
+ { 0x9004e, 0x1 },
+ { 0x9004f, 0x8 },
+ { 0x90050, 0x0 },
+ { 0x90051, 0x45a },
+ { 0x90052, 0x9 },
+ { 0x90053, 0x0 },
+ { 0x90054, 0x448 },
+ { 0x90055, 0x109 },
+ { 0x90056, 0x40 },
+ { 0x90057, 0x633 },
+ { 0x90058, 0x179 },
+ { 0x90059, 0x1 },
+ { 0x9005a, 0x618 },
+ { 0x9005b, 0x109 },
+ { 0x9005c, 0x40c0 },
+ { 0x9005d, 0x633 },
+ { 0x9005e, 0x149 },
+ { 0x9005f, 0x8 },
+ { 0x90060, 0x4 },
+ { 0x90061, 0x48 },
+ { 0x90062, 0x4040 },
+ { 0x90063, 0x633 },
+ { 0x90064, 0x149 },
+ { 0x90065, 0x0 },
+ { 0x90066, 0x4 },
+ { 0x90067, 0x48 },
+ { 0x90068, 0x40 },
+ { 0x90069, 0x633 },
+ { 0x9006a, 0x149 },
+ { 0x9006b, 0x10 },
+ { 0x9006c, 0x4 },
+ { 0x9006d, 0x18 },
+ { 0x9006e, 0x0 },
+ { 0x9006f, 0x4 },
+ { 0x90070, 0x78 },
+ { 0x90071, 0x549 },
+ { 0x90072, 0x633 },
+ { 0x90073, 0x159 },
+ { 0x90074, 0xd49 },
+ { 0x90075, 0x633 },
+ { 0x90076, 0x159 },
+ { 0x90077, 0x94a },
+ { 0x90078, 0x633 },
+ { 0x90079, 0x159 },
+ { 0x9007a, 0x441 },
+ { 0x9007b, 0x633 },
+ { 0x9007c, 0x149 },
+ { 0x9007d, 0x42 },
+ { 0x9007e, 0x633 },
+ { 0x9007f, 0x149 },
+ { 0x90080, 0x1 },
+ { 0x90081, 0x633 },
+ { 0x90082, 0x149 },
+ { 0x90083, 0x0 },
+ { 0x90084, 0xe0 },
+ { 0x90085, 0x109 },
+ { 0x90086, 0xa },
+ { 0x90087, 0x10 },
+ { 0x90088, 0x109 },
+ { 0x90089, 0x9 },
+ { 0x9008a, 0x3c0 },
+ { 0x9008b, 0x149 },
+ { 0x9008c, 0x9 },
+ { 0x9008d, 0x3c0 },
+ { 0x9008e, 0x159 },
+ { 0x9008f, 0x18 },
+ { 0x90090, 0x10 },
+ { 0x90091, 0x109 },
+ { 0x90092, 0x0 },
+ { 0x90093, 0x3c0 },
+ { 0x90094, 0x109 },
+ { 0x90095, 0x18 },
+ { 0x90096, 0x4 },
+ { 0x90097, 0x48 },
+ { 0x90098, 0x18 },
+ { 0x90099, 0x4 },
+ { 0x9009a, 0x58 },
+ { 0x9009b, 0xb },
+ { 0x9009c, 0x10 },
+ { 0x9009d, 0x109 },
+ { 0x9009e, 0x1 },
+ { 0x9009f, 0x10 },
+ { 0x900a0, 0x109 },
+ { 0x900a1, 0x5 },
+ { 0x900a2, 0x7c0 },
+ { 0x900a3, 0x109 },
+ { 0x40000, 0x811 },
+ { 0x40020, 0x880 },
+ { 0x40040, 0x0 },
+ { 0x40060, 0x0 },
+ { 0x40001, 0x4008 },
+ { 0x40021, 0x83 },
+ { 0x40041, 0x4f },
+ { 0x40061, 0x0 },
+ { 0x40002, 0x4040 },
+ { 0x40022, 0x83 },
+ { 0x40042, 0x51 },
+ { 0x40062, 0x0 },
+ { 0x40003, 0x811 },
+ { 0x40023, 0x880 },
+ { 0x40043, 0x0 },
+ { 0x40063, 0x0 },
+ { 0x40004, 0x720 },
+ { 0x40024, 0xf },
+ { 0x40044, 0x1740 },
+ { 0x40064, 0x0 },
+ { 0x40005, 0x16 },
+ { 0x40025, 0x83 },
+ { 0x40045, 0x4b },
+ { 0x40065, 0x0 },
+ { 0x40006, 0x716 },
+ { 0x40026, 0xf },
+ { 0x40046, 0x2001 },
+ { 0x40066, 0x0 },
+ { 0x40007, 0x716 },
+ { 0x40027, 0xf },
+ { 0x40047, 0x2800 },
+ { 0x40067, 0x0 },
+ { 0x40008, 0x716 },
+ { 0x40028, 0xf },
+ { 0x40048, 0xf00 },
+ { 0x40068, 0x0 },
+ { 0x40009, 0x720 },
+ { 0x40029, 0xf },
+ { 0x40049, 0x1400 },
+ { 0x40069, 0x0 },
+ { 0x4000a, 0xe08 },
+ { 0x4002a, 0xc15 },
+ { 0x4004a, 0x0 },
+ { 0x4006a, 0x0 },
+ { 0x4000b, 0x625 },
+ { 0x4002b, 0x15 },
+ { 0x4004b, 0x0 },
+ { 0x4006b, 0x0 },
+ { 0x4000c, 0x4028 },
+ { 0x4002c, 0x80 },
+ { 0x4004c, 0x0 },
+ { 0x4006c, 0x0 },
+ { 0x4000d, 0xe08 },
+ { 0x4002d, 0xc1a },
+ { 0x4004d, 0x0 },
+ { 0x4006d, 0x0 },
+ { 0x4000e, 0x625 },
+ { 0x4002e, 0x1a },
+ { 0x4004e, 0x0 },
+ { 0x4006e, 0x0 },
+ { 0x4000f, 0x4040 },
+ { 0x4002f, 0x80 },
+ { 0x4004f, 0x0 },
+ { 0x4006f, 0x0 },
+ { 0x40010, 0x2604 },
+ { 0x40030, 0x15 },
+ { 0x40050, 0x0 },
+ { 0x40070, 0x0 },
+ { 0x40011, 0x708 },
+ { 0x40031, 0x5 },
+ { 0x40051, 0x0 },
+ { 0x40071, 0x2002 },
+ { 0x40012, 0x8 },
+ { 0x40032, 0x80 },
+ { 0x40052, 0x0 },
+ { 0x40072, 0x0 },
+ { 0x40013, 0x2604 },
+ { 0x40033, 0x1a },
+ { 0x40053, 0x0 },
+ { 0x40073, 0x0 },
+ { 0x40014, 0x708 },
+ { 0x40034, 0xa },
+ { 0x40054, 0x0 },
+ { 0x40074, 0x2002 },
+ { 0x40015, 0x4040 },
+ { 0x40035, 0x80 },
+ { 0x40055, 0x0 },
+ { 0x40075, 0x0 },
+ { 0x40016, 0x60a },
+ { 0x40036, 0x15 },
+ { 0x40056, 0x1200 },
+ { 0x40076, 0x0 },
+ { 0x40017, 0x61a },
+ { 0x40037, 0x15 },
+ { 0x40057, 0x1300 },
+ { 0x40077, 0x0 },
+ { 0x40018, 0x60a },
+ { 0x40038, 0x1a },
+ { 0x40058, 0x1200 },
+ { 0x40078, 0x0 },
+ { 0x40019, 0x642 },
+ { 0x40039, 0x1a },
+ { 0x40059, 0x1300 },
+ { 0x40079, 0x0 },
+ { 0x4001a, 0x4808 },
+ { 0x4003a, 0x880 },
+ { 0x4005a, 0x0 },
+ { 0x4007a, 0x0 },
+ { 0x900a4, 0x0 },
+ { 0x900a5, 0x790 },
+ { 0x900a6, 0x11a },
+ { 0x900a7, 0x8 },
+ { 0x900a8, 0x7aa },
+ { 0x900a9, 0x2a },
+ { 0x900aa, 0x10 },
+ { 0x900ab, 0x7b2 },
+ { 0x900ac, 0x2a },
+ { 0x900ad, 0x0 },
+ { 0x900ae, 0x7c8 },
+ { 0x900af, 0x109 },
+ { 0x900b0, 0x10 },
+ { 0x900b1, 0x10 },
+ { 0x900b2, 0x109 },
+ { 0x900b3, 0x10 },
+ { 0x900b4, 0x2a8 },
+ { 0x900b5, 0x129 },
+ { 0x900b6, 0x8 },
+ { 0x900b7, 0x370 },
+ { 0x900b8, 0x129 },
+ { 0x900b9, 0xa },
+ { 0x900ba, 0x3c8 },
+ { 0x900bb, 0x1a9 },
+ { 0x900bc, 0xc },
+ { 0x900bd, 0x408 },
+ { 0x900be, 0x199 },
+ { 0x900bf, 0x14 },
+ { 0x900c0, 0x790 },
+ { 0x900c1, 0x11a },
+ { 0x900c2, 0x8 },
+ { 0x900c3, 0x4 },
+ { 0x900c4, 0x18 },
+ { 0x900c5, 0xe },
+ { 0x900c6, 0x408 },
+ { 0x900c7, 0x199 },
+ { 0x900c8, 0x8 },
+ { 0x900c9, 0x8568 },
+ { 0x900ca, 0x108 },
+ { 0x900cb, 0x18 },
+ { 0x900cc, 0x790 },
+ { 0x900cd, 0x16a },
+ { 0x900ce, 0x8 },
+ { 0x900cf, 0x1d8 },
+ { 0x900d0, 0x169 },
+ { 0x900d1, 0x10 },
+ { 0x900d2, 0x8558 },
+ { 0x900d3, 0x168 },
+ { 0x900d4, 0x70 },
+ { 0x900d5, 0x788 },
+ { 0x900d6, 0x16a },
+ { 0x900d7, 0x1ff8 },
+ { 0x900d8, 0x85a8 },
+ { 0x900d9, 0x1e8 },
+ { 0x900da, 0x50 },
+ { 0x900db, 0x798 },
+ { 0x900dc, 0x16a },
+ { 0x900dd, 0x60 },
+ { 0x900de, 0x7a0 },
+ { 0x900df, 0x16a },
+ { 0x900e0, 0x8 },
+ { 0x900e1, 0x8310 },
+ { 0x900e2, 0x168 },
+ { 0x900e3, 0x8 },
+ { 0x900e4, 0xa310 },
+ { 0x900e5, 0x168 },
+ { 0x900e6, 0xa },
+ { 0x900e7, 0x408 },
+ { 0x900e8, 0x169 },
+ { 0x900e9, 0x6e },
+ { 0x900ea, 0x0 },
+ { 0x900eb, 0x68 },
+ { 0x900ec, 0x0 },
+ { 0x900ed, 0x408 },
+ { 0x900ee, 0x169 },
+ { 0x900ef, 0x0 },
+ { 0x900f0, 0x8310 },
+ { 0x900f1, 0x168 },
+ { 0x900f2, 0x0 },
+ { 0x900f3, 0xa310 },
+ { 0x900f4, 0x168 },
+ { 0x900f5, 0x1ff8 },
+ { 0x900f6, 0x85a8 },
+ { 0x900f7, 0x1e8 },
+ { 0x900f8, 0x68 },
+ { 0x900f9, 0x798 },
+ { 0x900fa, 0x16a },
+ { 0x900fb, 0x78 },
+ { 0x900fc, 0x7a0 },
+ { 0x900fd, 0x16a },
+ { 0x900fe, 0x68 },
+ { 0x900ff, 0x790 },
+ { 0x90100, 0x16a },
+ { 0x90101, 0x8 },
+ { 0x90102, 0x8b10 },
+ { 0x90103, 0x168 },
+ { 0x90104, 0x8 },
+ { 0x90105, 0xab10 },
+ { 0x90106, 0x168 },
+ { 0x90107, 0xa },
+ { 0x90108, 0x408 },
+ { 0x90109, 0x169 },
+ { 0x9010a, 0x58 },
+ { 0x9010b, 0x0 },
+ { 0x9010c, 0x68 },
+ { 0x9010d, 0x0 },
+ { 0x9010e, 0x408 },
+ { 0x9010f, 0x169 },
+ { 0x90110, 0x0 },
+ { 0x90111, 0x8b10 },
+ { 0x90112, 0x168 },
+ { 0x90113, 0x1 },
+ { 0x90114, 0xab10 },
+ { 0x90115, 0x168 },
+ { 0x90116, 0x0 },
+ { 0x90117, 0x1d8 },
+ { 0x90118, 0x169 },
+ { 0x90119, 0x80 },
+ { 0x9011a, 0x790 },
+ { 0x9011b, 0x16a },
+ { 0x9011c, 0x18 },
+ { 0x9011d, 0x7aa },
+ { 0x9011e, 0x6a },
+ { 0x9011f, 0xa },
+ { 0x90120, 0x0 },
+ { 0x90121, 0x1e9 },
+ { 0x90122, 0x8 },
+ { 0x90123, 0x8080 },
+ { 0x90124, 0x108 },
+ { 0x90125, 0xf },
+ { 0x90126, 0x408 },
+ { 0x90127, 0x169 },
+ { 0x90128, 0xc },
+ { 0x90129, 0x0 },
+ { 0x9012a, 0x68 },
+ { 0x9012b, 0x9 },
+ { 0x9012c, 0x0 },
+ { 0x9012d, 0x1a9 },
+ { 0x9012e, 0x0 },
+ { 0x9012f, 0x408 },
+ { 0x90130, 0x169 },
+ { 0x90131, 0x0 },
+ { 0x90132, 0x8080 },
+ { 0x90133, 0x108 },
+ { 0x90134, 0x8 },
+ { 0x90135, 0x7aa },
+ { 0x90136, 0x6a },
+ { 0x90137, 0x0 },
+ { 0x90138, 0x8568 },
+ { 0x90139, 0x108 },
+ { 0x9013a, 0xb7 },
+ { 0x9013b, 0x790 },
+ { 0x9013c, 0x16a },
+ { 0x9013d, 0x1f },
+ { 0x9013e, 0x0 },
+ { 0x9013f, 0x68 },
+ { 0x90140, 0x8 },
+ { 0x90141, 0x8558 },
+ { 0x90142, 0x168 },
+ { 0x90143, 0xf },
+ { 0x90144, 0x408 },
+ { 0x90145, 0x169 },
+ { 0x90146, 0xd },
+ { 0x90147, 0x0 },
+ { 0x90148, 0x68 },
+ { 0x90149, 0x0 },
+ { 0x9014a, 0x408 },
+ { 0x9014b, 0x169 },
+ { 0x9014c, 0x0 },
+ { 0x9014d, 0x8558 },
+ { 0x9014e, 0x168 },
+ { 0x9014f, 0x8 },
+ { 0x90150, 0x3c8 },
+ { 0x90151, 0x1a9 },
+ { 0x90152, 0x3 },
+ { 0x90153, 0x370 },
+ { 0x90154, 0x129 },
+ { 0x90155, 0x20 },
+ { 0x90156, 0x2aa },
+ { 0x90157, 0x9 },
+ { 0x90158, 0x8 },
+ { 0x90159, 0xe8 },
+ { 0x9015a, 0x109 },
+ { 0x9015b, 0x0 },
+ { 0x9015c, 0x8140 },
+ { 0x9015d, 0x10c },
+ { 0x9015e, 0x10 },
+ { 0x9015f, 0x8138 },
+ { 0x90160, 0x104 },
+ { 0x90161, 0x8 },
+ { 0x90162, 0x448 },
+ { 0x90163, 0x109 },
+ { 0x90164, 0xf },
+ { 0x90165, 0x7c0 },
+ { 0x90166, 0x109 },
+ { 0x90167, 0x0 },
+ { 0x90168, 0xe8 },
+ { 0x90169, 0x109 },
+ { 0x9016a, 0x47 },
+ { 0x9016b, 0x630 },
+ { 0x9016c, 0x109 },
+ { 0x9016d, 0x8 },
+ { 0x9016e, 0x618 },
+ { 0x9016f, 0x109 },
+ { 0x90170, 0x8 },
+ { 0x90171, 0xe0 },
+ { 0x90172, 0x109 },
+ { 0x90173, 0x0 },
+ { 0x90174, 0x7c8 },
+ { 0x90175, 0x109 },
+ { 0x90176, 0x8 },
+ { 0x90177, 0x8140 },
+ { 0x90178, 0x10c },
+ { 0x90179, 0x0 },
+ { 0x9017a, 0x478 },
+ { 0x9017b, 0x109 },
+ { 0x9017c, 0x0 },
+ { 0x9017d, 0x1 },
+ { 0x9017e, 0x8 },
+ { 0x9017f, 0x8 },
+ { 0x90180, 0x4 },
+ { 0x90181, 0x0 },
+ { 0x90006, 0x8 },
+ { 0x90007, 0x7c8 },
+ { 0x90008, 0x109 },
+ { 0x90009, 0x0 },
+ { 0x9000a, 0x400 },
+ { 0x9000b, 0x106 },
+ { 0xd00e7, 0x400 },
+ { 0x90017, 0x0 },
+ { 0x9001f, 0x29 },
+ { 0x90026, 0x68 },
+ { 0x400d0, 0x0 },
+ { 0x400d1, 0x101 },
+ { 0x400d2, 0x105 },
+ { 0x400d3, 0x107 },
+ { 0x400d4, 0x10f },
+ { 0x400d5, 0x202 },
+ { 0x400d6, 0x20a },
+ { 0x400d7, 0x20b },
+ { 0x2003a, 0x2 },
+ { 0x200be, 0x3 },
+ { 0x2000b, 0x465 },
+ { 0x2000c, 0xfa },
+ { 0x2000d, 0x9c4 },
+ { 0x2000e, 0x2c },
+ { 0x12000b, 0x71 },
+ { 0x12000c, 0x19 },
+ { 0x12000d, 0xfa },
+ { 0x12000e, 0x10 },
+ { 0x22000b, 0x1d },
+ { 0x22000c, 0x6 },
+ { 0x22000d, 0x3e },
+ { 0x22000e, 0x10 },
+ { 0x9000c, 0x0 },
+ { 0x9000d, 0x173 },
+ { 0x9000e, 0x60 },
+ { 0x9000f, 0x6110 },
+ { 0x90010, 0x2152 },
+ { 0x90011, 0xdfbd },
+ { 0x90012, 0x2060 },
+ { 0x90013, 0x6152 },
+ { 0x20010, 0x5a },
+ { 0x20011, 0x3 },
+ { 0x40080, 0xe0 },
+ { 0x40081, 0x12 },
+ { 0x40082, 0xe0 },
+ { 0x40083, 0x12 },
+ { 0x40084, 0xe0 },
+ { 0x40085, 0x12 },
+ { 0x140080, 0xe0 },
+ { 0x140081, 0x12 },
+ { 0x140082, 0xe0 },
+ { 0x140083, 0x12 },
+ { 0x140084, 0xe0 },
+ { 0x140085, 0x12 },
+ { 0x240080, 0xe0 },
+ { 0x240081, 0x12 },
+ { 0x240082, 0xe0 },
+ { 0x240083, 0x12 },
+ { 0x240084, 0xe0 },
+ { 0x240085, 0x12 },
+ { 0x400fd, 0xf },
+ { 0x10011, 0x1 },
+ { 0x10012, 0x1 },
+ { 0x10013, 0x180 },
+ { 0x10018, 0x1 },
+ { 0x10002, 0x6209 },
+ { 0x100b2, 0x1 },
+ { 0x101b4, 0x1 },
+ { 0x102b4, 0x1 },
+ { 0x103b4, 0x1 },
+ { 0x104b4, 0x1 },
+ { 0x105b4, 0x1 },
+ { 0x106b4, 0x1 },
+ { 0x107b4, 0x1 },
+ { 0x108b4, 0x1 },
+ { 0x11011, 0x1 },
+ { 0x11012, 0x1 },
+ { 0x11013, 0x180 },
+ { 0x11018, 0x1 },
+ { 0x11002, 0x6209 },
+ { 0x110b2, 0x1 },
+ { 0x111b4, 0x1 },
+ { 0x112b4, 0x1 },
+ { 0x113b4, 0x1 },
+ { 0x114b4, 0x1 },
+ { 0x115b4, 0x1 },
+ { 0x116b4, 0x1 },
+ { 0x117b4, 0x1 },
+ { 0x118b4, 0x1 },
+ { 0x12011, 0x1 },
+ { 0x12012, 0x1 },
+ { 0x12013, 0x180 },
+ { 0x12018, 0x1 },
+ { 0x12002, 0x6209 },
+ { 0x120b2, 0x1 },
+ { 0x121b4, 0x1 },
+ { 0x122b4, 0x1 },
+ { 0x123b4, 0x1 },
+ { 0x124b4, 0x1 },
+ { 0x125b4, 0x1 },
+ { 0x126b4, 0x1 },
+ { 0x127b4, 0x1 },
+ { 0x128b4, 0x1 },
+ { 0x13011, 0x1 },
+ { 0x13012, 0x1 },
+ { 0x13013, 0x180 },
+ { 0x13018, 0x1 },
+ { 0x13002, 0x6209 },
+ { 0x130b2, 0x1 },
+ { 0x131b4, 0x1 },
+ { 0x132b4, 0x1 },
+ { 0x133b4, 0x1 },
+ { 0x134b4, 0x1 },
+ { 0x135b4, 0x1 },
+ { 0x136b4, 0x1 },
+ { 0x137b4, 0x1 },
+ { 0x138b4, 0x1 },
+ { 0x20089, 0x1 },
+ { 0x20088, 0x19 },
+ { 0xc0080, 0x2 },
+ { 0xd0000, 0x1 },
+};
+
+struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+ {
+ /* P0 4000mts 1D */
+ .drate = 4000,
+ .fw_type = FW_1D_IMAGE,
+ .fsp_cfg = ddr_fsp0_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+ },
+ {
+ /* P1 400mts 1D */
+ .drate = 400,
+ .fw_type = FW_1D_IMAGE,
+ .fsp_cfg = ddr_fsp1_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+ },
+ {
+ /* P2 100mts 1D */
+ .drate = 100,
+ .fw_type = FW_1D_IMAGE,
+ .fsp_cfg = ddr_fsp2_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
+ },
+ {
+ /* P0 4000mts 2D */
+ .drate = 4000,
+ .fw_type = FW_2D_IMAGE,
+ .fsp_cfg = ddr_fsp0_2d_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+ },
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing = {
+ .ddrc_cfg = ddr_ddrc_cfg,
+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+ .ddrphy_cfg = ddr_ddrphy_cfg,
+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+ .fsp_msg = ddr_dram_fsp_msg,
+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+ .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+ .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+ .ddrphy_pie = ddr_phy_pie,
+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+ .fsp_table = { 4000, 400, 100, },
+};
diff --git a/board/kontron/osm-s-mx8mp/osm-s-mx8mp.c b/board/kontron/osm-s-mx8mp/osm-s-mx8mp.c
new file mode 100644
index 00000000000..3db7176f723
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/osm-s-mx8mp.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Kontron Electronics GmbH
+ */
+
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <dm/uclass.h>
+#include <efi.h>
+#include <efi_loader.h>
+#include <env_internal.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <mmc.h>
+#include <net.h>
+#include <power/regulator.h>
+
+#include "../common/hw-uid.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if IS_ENABLED(CONFIG_KONTRON_HW_UID)
+struct uid_otp_loc uid_otp_locations[] = {
+ {
+ .addr = (u32 *)(OCOTP_BASE_ADDR + 0x7A0),
+ .len = 2,
+ .format = UID_OTP_FORMAT_DEC,
+ .desc = "BOARD"
+ },
+ {
+ .addr = (u32 *)(OCOTP_BASE_ADDR + 0x780),
+ .len = 2,
+ .format = UID_OTP_FORMAT_DEC,
+ .desc = "SOM"
+ },
+#if IS_ENABLED(CONFIG_KONTRON_HW_UID_USE_SOC_FALLBACK)
+ {
+ .addr = (u32 *)(OCOTP_BASE_ADDR + 0xE00),
+ .len = 2,
+ .format = UID_OTP_FORMAT_HEX,
+ .desc = "SOC"
+ }
+#endif
+};
+#endif /* CONFIG_KONTRON_HW_UID */
+
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
+struct efi_fw_image fw_images[] = {
+ {
+ .fw_name = u"KONTRON-OSM-S-MX8MP-UBOOT",
+ .image_index = 1,
+ },
+};
+
+struct efi_capsule_update_info update_info = {
+ .dfu_string = "mmc 0=flash-bin raw 0 0x2000 mmcpart 1",
+ .images = fw_images,
+};
+
+u8 num_image_type_guids = ARRAY_SIZE(fw_images);
+#endif /* EFI_HAVE_CAPSULE_SUPPORT */
+
+int board_phys_sdram_size(phys_size_t *size)
+{
+ if (!size)
+ return -EINVAL;
+
+ *size = get_ram_size((void *)PHYS_SDRAM, 0x200000000);
+
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ enum boot_device boot_dev;
+ char env_str_sd[] = "sd-card";
+ char env_str_emmc[] = "emmc";
+ char *env_config_str;
+
+ if (env_get_location(0, 0) != ENVL_MMC)
+ return 0;
+
+ boot_dev = get_boot_device();
+ if (boot_dev == SD2_BOOT)
+ env_config_str = env_str_sd;
+ else if (boot_dev == MMC1_BOOT)
+ env_config_str = env_str_emmc;
+ else
+ return 0;
+
+ /*
+ * Export a string to the devicetree that tells userspace tools like
+ * libubootenv where the environment is currently coming from.
+ */
+ return fdt_find_and_setprop(blob, "/chosen", "u-boot,env-config",
+ env_config_str, strlen(env_config_str) + 1, 1);
+}
+
+int board_late_init(void)
+{
+ if (IS_ENABLED(CONFIG_KONTRON_HW_UID))
+ get_serial_number(uid_otp_locations, ARRAY_SIZE(uid_otp_locations));
+
+ if (is_usb_boot()) {
+ env_set("bootcmd", "fastboot 0");
+ env_set("bootdelay", "0");
+ }
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
+int board_mmc_get_env_dev(int devno)
+{
+ return devno;
+}
+
+uint mmc_get_env_part(struct mmc *mmc)
+{
+ if (IS_SD(mmc))
+ return EMMC_HWPART_DEFAULT;
+
+ switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) {
+ case EMMC_BOOT_PART_BOOT1:
+ return EMMC_HWPART_BOOT1;
+ case EMMC_BOOT_PART_BOOT2:
+ return EMMC_HWPART_BOOT2;
+ default:
+ return EMMC_HWPART_DEFAULT;
+ }
+}
+
+int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr)
+{
+ /* use normal offset for SD card */
+ if (IS_SD(mmc)) {
+ *env_addr = CONFIG_ENV_OFFSET;
+ if (copy)
+ *env_addr = CONFIG_ENV_OFFSET_REDUND;
+
+ return 0;
+ }
+
+ switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) {
+ case EMMC_BOOT_PART_BOOT1:
+ case EMMC_BOOT_PART_BOOT2:
+ *env_addr = mmc->capacity - CONFIG_ENV_SIZE - CONFIG_ENV_SIZE;
+ if (copy)
+ *env_addr = mmc->capacity - CONFIG_ENV_SIZE;
+ break;
+ default:
+ *env_addr = CONFIG_ENV_OFFSET;
+ if (copy)
+ *env_addr = CONFIG_ENV_OFFSET_REDUND;
+ }
+
+ return 0;
+}
+#endif
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+ if (prio)
+ return ENVL_UNKNOWN;
+
+ if (CONFIG_IS_ENABLED(ENV_IS_NOWHERE) && is_usb_boot())
+ return ENVL_NOWHERE;
+
+ return arch_env_get_location(op, prio);
+}
diff --git a/board/kontron/osm-s-mx8mp/osm-s-mx8mp.env b/board/kontron/osm-s-mx8mp/osm-s-mx8mp.env
new file mode 100644
index 00000000000..b6af9daccae
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/osm-s-mx8mp.env
@@ -0,0 +1,6 @@
+kernel_addr_r=0x42000000
+fdt_addr_r=0x48000000
+fdtoverlay_addr_r=0x49000000
+ramdisk_addr_r=0x48080000
+scriptaddr=0x40000000
+pxefile_addr_r=0x40100000
diff --git a/board/kontron/osm-s-mx8mp/spl.c b/board/kontron/osm-s-mx8mp/spl.c
new file mode 100644
index 00000000000..20fd960243b
--- /dev/null
+++ b/board/kontron/osm-s-mx8mp/spl.c
@@ -0,0 +1,358 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Kontron Electronics GmbH
+ */
+
+#include <asm/arch/imx8mp_pins.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <dm/uclass.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
+#include <hang.h>
+#include <i2c.h>
+#include <init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <power/pca9450.h>
+#include <power/pmic.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spl_board_boot_device(enum boot_device boot_dev_spl)
+{
+ if (IS_ENABLED(CONFIG_SPL_BOOTROM_SUPPORT))
+ return BOOT_DEVICE_BOOTROM;
+
+ switch (boot_dev_spl) {
+ case SD1_BOOT:
+ case MMC1_BOOT:
+ return BOOT_DEVICE_MMC1;
+ case SD2_BOOT:
+ case MMC2_BOOT:
+ return BOOT_DEVICE_MMC2;
+ default:
+ return BOOT_DEVICE_NONE;
+ }
+}
+
+bool check_ram_available(long size)
+{
+ long sz = get_ram_size((long *)PHYS_SDRAM, size);
+
+ if (sz == size)
+ return true;
+
+ return false;
+}
+
+static void spl_dram_init(void)
+{
+ u32 size = 0;
+ int i, ret;
+
+ /*
+ * First check the largest possible DDR size of 8GB, then try the lower
+ * configs.
+ */
+ ret = ddr_init(&dram_timing);
+ if (!ret && check_ram_available(SZ_4G << 1))
+ size = 8;
+ // assume 4GB if ddr_init() succeeds but 8GB can not be addressed
+ else if (!ret) {
+ /*
+ * For some strange, unknown reason freezes are occurring if we run
+ * check_ram_available() after the second call to ddr_init(). This
+ * doesn't seem to be an issue with caching as it also happens with
+ * caches disable. The workaround that does the trick is accessing the
+ * DDR areas once more before calling ddr_init() and
+ * check_ram_available() again. This can be done by rerunning the size
+ * check on the first few bytes of the DDR.
+ * On the other hand this breaks the 1GB DDR init, but we can skip this
+ * as the 1GB is single rank and the training fails. We can detect that
+ * by checking the return code of ddr_init().
+ */
+ check_ram_available(256);
+
+ /*
+ * Overwrite some values to comply with the 4GB DDR.
+ */
+ dram_timing.ddrc_cfg[5].val = 0x7a0118;
+ dram_timing.ddrc_cfg[12].val = 0x650048;
+ dram_timing.ddrc_cfg[13].val = 0x140048;
+ dram_timing.ddrc_cfg[23].val = 0x120;
+ dram_timing.ddrc_cfg[39].val = 0x17;
+ dram_timing.ddrc_cfg[46].val = 0xf0f;
+ dram_timing.ddrc_cfg[62].val = 0xc001c;
+ dram_timing.ddrc_cfg[66].val = 0x160048;
+ dram_timing.ddrc_cfg[77].val = 0x1d;
+ dram_timing.ddrc_cfg[87].val = 0x30007;
+ dram_timing.ddrc_cfg[91].val = 0x160048;
+ dram_timing.ddrc_cfg[102].val = 0x8;
+
+ for (i = 114; i < 138; i++)
+ dram_timing.ddrphy_cfg[i].val = 0xe38;
+
+ dram_timing.ddrphy_cfg[155].val = 0xdc;
+ dram_timing.ddrphy_cfg[164].val = 0xdc;
+ dram_timing.ddrphy_cfg[173].val = 0xdc;
+
+ dram_timing.fsp_msg[0].fsp_cfg[3].val = 0x283c;
+ dram_timing.fsp_msg[0].fsp_cfg[4].val = 0x11;
+ dram_timing.fsp_msg[0].fsp_cfg[12].val = 0x4865;
+ dram_timing.fsp_msg[0].fsp_cfg[13].val = 0x4800;
+ dram_timing.fsp_msg[0].fsp_cfg[17].val = 0x4865;
+ dram_timing.fsp_msg[0].fsp_cfg[18].val = 0x4800;
+ dram_timing.fsp_msg[0].fsp_cfg[24].val = 0x6500;
+ dram_timing.fsp_msg[0].fsp_cfg[26].val = 0x48;
+ dram_timing.fsp_msg[0].fsp_cfg[30].val = 0x6500;
+ dram_timing.fsp_msg[0].fsp_cfg[32].val = 0x48;
+
+ dram_timing.fsp_msg[1].fsp_cfg[4].val = 0x283c;
+ dram_timing.fsp_msg[1].fsp_cfg[5].val = 0x11;
+ dram_timing.fsp_msg[1].fsp_cfg[14].val = 0x4800;
+ dram_timing.fsp_msg[1].fsp_cfg[19].val = 0x4800;
+ dram_timing.fsp_msg[1].fsp_cfg[27].val = 0x48;
+ dram_timing.fsp_msg[1].fsp_cfg[33].val = 0x48;
+
+ dram_timing.fsp_msg[2].fsp_cfg[4].val = 0x283c;
+ dram_timing.fsp_msg[2].fsp_cfg[5].val = 0x11;
+ dram_timing.fsp_msg[2].fsp_cfg[14].val = 0x4800;
+ dram_timing.fsp_msg[2].fsp_cfg[19].val = 0x4800;
+ dram_timing.fsp_msg[2].fsp_cfg[27].val = 0x48;
+ dram_timing.fsp_msg[2].fsp_cfg[33].val = 0x48;
+
+ dram_timing.fsp_msg[3].fsp_cfg[3].val = 0x283c;
+ dram_timing.fsp_msg[3].fsp_cfg[4].val = 0x11;
+ dram_timing.fsp_msg[3].fsp_cfg[14].val = 0x4865;
+ dram_timing.fsp_msg[3].fsp_cfg[15].val = 0x4800;
+ dram_timing.fsp_msg[3].fsp_cfg[19].val = 0x4865;
+ dram_timing.fsp_msg[3].fsp_cfg[20].val = 0x4800;
+ dram_timing.fsp_msg[3].fsp_cfg[26].val = 0x6500;
+ dram_timing.fsp_msg[3].fsp_cfg[28].val = 0x48;
+ dram_timing.fsp_msg[3].fsp_cfg[32].val = 0x6500;
+ dram_timing.fsp_msg[3].fsp_cfg[34].val = 0x48;
+
+ if (!ddr_init(&dram_timing) && check_ram_available(SZ_4G))
+ size = 4;
+ }
+ // assume 1GB if 8GB training failed
+ else if (size == 0) {
+ /*
+ * Overwrite some values to comply with the 1GB DDR.
+ */
+ dram_timing.ddrc_cfg[2].val = 0xa1080020;
+ dram_timing.ddrc_cfg[5].val = 0x7a00b4;
+ dram_timing.ddrc_cfg[12].val = 0x550048;
+ dram_timing.ddrc_cfg[13].val = 0x15002f;
+ dram_timing.ddrc_cfg[23].val = 0xbc;
+ dram_timing.ddrc_cfg[39].val = 0x1f;
+ dram_timing.ddrc_cfg[45].val = 0xf070707;
+ dram_timing.ddrc_cfg[62].val = 0xc0012;
+ dram_timing.ddrc_cfg[66].val = 0x16002f;
+ dram_timing.ddrc_cfg[77].val = 0x13;
+ dram_timing.ddrc_cfg[87].val = 0x30005;
+ dram_timing.ddrc_cfg[91].val = 0x16002f;
+ dram_timing.ddrc_cfg[102].val = 0x5;
+
+ for (i = 90; i < 114; i++)
+ dram_timing.ddrphy_cfg[i].val = 0x680;
+
+ for (; i < 138; i++)
+ dram_timing.ddrphy_cfg[i].val = 0x69a;
+
+ dram_timing.ddrphy_cfg[155].val = 0x104;
+ dram_timing.ddrphy_cfg[164].val = 0x104;
+ dram_timing.ddrphy_cfg[173].val = 0x104;
+
+ dram_timing.fsp_msg[0].fsp_cfg[3].val = 0x3030;
+ dram_timing.fsp_msg[0].fsp_cfg[4].val = 0x14;
+ dram_timing.fsp_msg[0].fsp_cfg[9].val = 0x110;
+ dram_timing.fsp_msg[0].fsp_cfg[12].val = 0x4855;
+ dram_timing.fsp_msg[0].fsp_cfg[13].val = 0x2f00;
+ dram_timing.fsp_msg[0].fsp_cfg[14].val = 0x15;
+ dram_timing.fsp_msg[0].fsp_cfg[17].val = 0x4855;
+ dram_timing.fsp_msg[0].fsp_cfg[18].val = 0x2f00;
+ dram_timing.fsp_msg[0].fsp_cfg[19].val = 0x15;
+ dram_timing.fsp_msg[0].fsp_cfg[21].val = 0x1;
+ dram_timing.fsp_msg[0].fsp_cfg[24].val = 0x5500;
+ dram_timing.fsp_msg[0].fsp_cfg[26].val = 0x2f;
+ dram_timing.fsp_msg[0].fsp_cfg[27].val = 0x1500;
+ dram_timing.fsp_msg[0].fsp_cfg[30].val = 0x5500;
+ dram_timing.fsp_msg[0].fsp_cfg[32].val = 0x2f;
+ dram_timing.fsp_msg[0].fsp_cfg[33].val = 0x1500;
+
+ dram_timing.fsp_msg[1].fsp_cfg[4].val = 0x3030;
+ dram_timing.fsp_msg[1].fsp_cfg[5].val = 0x14;
+ dram_timing.fsp_msg[1].fsp_cfg[10].val = 0x110;
+ dram_timing.fsp_msg[1].fsp_cfg[14].val = 0x2f00;
+ dram_timing.fsp_msg[1].fsp_cfg[19].val = 0x2f00;
+ dram_timing.fsp_msg[1].fsp_cfg[22].val = 0x1;
+ dram_timing.fsp_msg[1].fsp_cfg[27].val = 0x2f;
+ dram_timing.fsp_msg[1].fsp_cfg[33].val = 0x2f;
+
+ dram_timing.fsp_msg[2].fsp_cfg[4].val = 0x3030;
+ dram_timing.fsp_msg[2].fsp_cfg[5].val = 0x14;
+ dram_timing.fsp_msg[2].fsp_cfg[10].val = 0x110;
+ dram_timing.fsp_msg[2].fsp_cfg[14].val = 0x2f00;
+ dram_timing.fsp_msg[2].fsp_cfg[19].val = 0x2f00;
+ dram_timing.fsp_msg[2].fsp_cfg[22].val = 0x1;
+ dram_timing.fsp_msg[2].fsp_cfg[27].val = 0x2f;
+ dram_timing.fsp_msg[2].fsp_cfg[33].val = 0x2f;
+
+ dram_timing.fsp_msg[3].fsp_cfg[3].val = 0x3030;
+ dram_timing.fsp_msg[3].fsp_cfg[4].val = 0x14;
+ dram_timing.fsp_msg[3].fsp_cfg[11].val = 0x110;
+ dram_timing.fsp_msg[3].fsp_cfg[14].val = 0x4855;
+ dram_timing.fsp_msg[3].fsp_cfg[15].val = 0x2f00;
+ dram_timing.fsp_msg[3].fsp_cfg[16].val = 0x15;
+ dram_timing.fsp_msg[3].fsp_cfg[19].val = 0x4855;
+ dram_timing.fsp_msg[3].fsp_cfg[20].val = 0x2f00;
+ dram_timing.fsp_msg[3].fsp_cfg[21].val = 0x15;
+ dram_timing.fsp_msg[3].fsp_cfg[23].val = 0x1;
+ dram_timing.fsp_msg[3].fsp_cfg[26].val = 0x5500;
+ dram_timing.fsp_msg[3].fsp_cfg[28].val = 0x2f;
+ dram_timing.fsp_msg[3].fsp_cfg[29].val = 0x1500;
+ dram_timing.fsp_msg[3].fsp_cfg[32].val = 0x5500;
+ dram_timing.fsp_msg[3].fsp_cfg[34].val = 0x2f;
+ dram_timing.fsp_msg[3].fsp_cfg[35].val = 0x1500;
+
+ if (!ddr_init(&dram_timing) && check_ram_available(SZ_1G))
+ size = 1;
+ }
+
+ if (size == 0) {
+ printf("Failed to initialize DDR RAM!\n");
+ size = 1;
+ } else {
+ printf("DDR: LPDDR4 initialized (%dGB)\n", size);
+ }
+
+ gd->ram_size = size;
+}
+
+void spl_board_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_FSL_CAAM)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+ }
+
+ /*
+ * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
+ * not allow to change it. Should set the clock after PMIC
+ * setting done. Default is 400Mhz (system_pll1_800m with div = 2)
+ * set by ROM for ND VDD_SOC
+ */
+ clock_enable(CCGR_GIC, 0);
+ clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
+ clock_enable(CCGR_GIC, 1);
+}
+
+static int power_init_board(void)
+{
+ struct udevice *dev;
+ int ret = pmic_get("pmic at 25", &dev);
+
+ if (ret == -ENODEV)
+ puts("No pmic found\n");
+
+ if (ret)
+ return ret;
+
+ /* BUCKxOUT_DVS0/1 control BUCK123 output */
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
+
+ /* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
+
+ /* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+ /* Set WDOG_B_CFG to cold reset */
+ pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
+
+ /* Enable I2C level translator */
+ pmic_reg_write(dev, PCA9450_CONFIG2, 0x01);
+
+ return 0;
+}
+
+unsigned long board_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, unsigned long raw_sect)
+{
+ /*
+ * The image offset on SD/MMC devices is 32 KiB, except for eMMC boot from
+ * HW boot part. In this case it is 0 KiB. In order to make the bootloader
+ * universal, check for HW boot part and adjust the offset.
+ */
+ if (!IS_SD(mmc)) {
+ switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) {
+ case EMMC_BOOT_PART_BOOT1:
+ case EMMC_BOOT_PART_BOOT2:
+ raw_sect -= 32 * 2;
+ break;
+ }
+ }
+
+ return raw_sect;
+}
+
+const char *spl_board_loader_name(u32 boot_device)
+{
+ static char name[16];
+ struct mmc *mmc;
+
+ switch (boot_device) {
+ case BOOT_DEVICE_MMC1:
+ mmc_init_device(0);
+ mmc = find_mmc_device(0);
+ mmc_init(mmc);
+ snprintf(name, sizeof(name), "eMMC %s",
+ emmc_hwpart_names[EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)]);
+ return name;
+ case BOOT_DEVICE_MMC2:
+ sprintf(name, "SD card");
+ return name;
+ }
+
+ return NULL;
+}
+
+void board_init_f(ulong dummy)
+{
+ int ret;
+
+ arch_cpu_init();
+
+ init_uart_clk(2);
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ preloader_console_init();
+
+ enable_tzc380();
+
+ /* PMIC initialization */
+ power_init_board();
+
+ /* DDR initialization */
+ spl_dram_init();
+}
diff --git a/configs/kontron-osm-s-mx8mp.config b/configs/kontron-osm-s-mx8mp.config
new file mode 100644
index 00000000000..a8881726e07
--- /dev/null
+++ b/configs/kontron-osm-s-mx8mp.config
@@ -0,0 +1,203 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_TEXT_BASE=0x40200000
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x1E0000
+CONFIG_IMX_CONFIG="board/kontron/osm-s-mx8mp/imximage.cfg"
+CONFIG_DM_GPIO=y
+CONFIG_KONTRON_HW_UID=y
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-kontron-bl-osm-s"
+CONFIG_TARGET_KONTRON_MX8MP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_STACK=0x96fc00
+CONFIG_SPL_TEXT_BASE=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SYS_LOAD_ADDR=0x42000000
+CONFIG_SPL=y
+CONFIG_ENV_OFFSET_REDUND=0x1F0000
+CONFIG_IMX_BOOTAUX=y
+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
+CONFIG_EFI_SET_TIME=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTMETH_RAUC=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_BOARD_TYPES=y
+# CONFIG_BOARD_INIT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_MAX_SIZE=0x26000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_HAVE_INIT_STACK=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=8192
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=6
+CONFIG_CMD_MD5SUM=y
+CONFIG_MD5SUM_VERIFY=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_SHA1SUM_VERIFY=y
+# CONFIG_CMD_LZMADEC is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MBR=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_MMC_SPEED_MODE_SET=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_BOOTCOUNT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_RTC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_UUID=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_SMC=y
+CONFIG_HASH_VERIFY=y
+CONFIG_CMD_BTRFS=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_REDUNDANT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_HOSTNAME=y
+CONFIG_HOSTNAME="kontron-mx8mp"
+CONFIG_VERSION_VARIABLE=y
+CONFIG_TFTP_TSIZE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MP=y
+CONFIG_CLK_IMX8MP=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x42000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
+CONFIG_GPIO_HOG=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_USB_HUB_USB251XB=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SPL_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHY_ETHERNET_ID=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_IMX=y
+CONFIG_FEC_MXC=y
+CONFIG_RGMII=y
+CONFIG_MII=y
+CONFIG_RMII=y
+CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
+CONFIG_SPL_DM_REGULATOR_PCA9450=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_RV3028=y
+CONFIG_RTC_RV8803=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/kontron-osm-s-mx8mp_defconfig b/configs/kontron-osm-s-mx8mp_defconfig
new file mode 100644
index 00000000000..096390b897b
--- /dev/null
+++ b/configs/kontron-osm-s-mx8mp_defconfig
@@ -0,0 +1,3 @@
+#include <configs/kontron-osm-s-mx8mp.config>
+
+CONFIG_SPL_BOOTROM_SUPPORT=y
diff --git a/doc/board/kontron/index.rst b/doc/board/kontron/index.rst
index cb1906e626b..2f103773f63 100644
--- a/doc/board/kontron/index.rst
+++ b/doc/board/kontron/index.rst
@@ -6,6 +6,7 @@ Kontron
.. toctree::
:maxdepth: 2
+ osm-s-mx8mp
pitx-imx8m
sl28
sl-mx6ul
diff --git a/doc/board/kontron/osm-s-mx8mp.rst b/doc/board/kontron/osm-s-mx8mp.rst
new file mode 100644
index 00000000000..37fb0f7b917
--- /dev/null
+++ b/doc/board/kontron/osm-s-mx8mp.rst
@@ -0,0 +1,104 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron Electronics i.MX8MP SoMs and Boards
+===========================================
+
+The OSM-S i.MX8MP by Kontron Electronics GmbH is a SoM module with an
+i.MX8M-Plus SoC, up to 8 GB LPDDR4 RAM, eMMC, PMIC, RTC.
+
+The matching evaluation boards (Board-Line, BL) have two Ethernet ports,
+USB 2.0, HDMI/LVDS, SD card, CAN, RS485, RS232 and much more.
+
+The OSM-S i.MX8MP is compliant to the Open Standard Module (OSM) 1.1
+specification, size S (https://sget.org/standards/osm).
+
+Quick Start
+-----------
+
+- Get and Build the Trusted Firmware-A (TF-A)
+- Get the DDR firmware
+- Build U-Boot
+- Boot
+
+.. note::
+
+ To build on a x86-64 host machine, you need a GNU cross toolchain for the
+ target architecture (aarch64). Check your distros package manager or
+ download and install the necessary tools (``aarch64-linux-gnu-*``) manually.
+
+Get and Build the Trusted Firmware-A (TF-A)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+There are two sources for the TF-A. Mainline and NXP. Get the one you prefer
+(support and features might differ).
+
+.. note::
+
+ If you are using GCC 12 and you get compiler/linker errors, try to add the
+ following arguments to your make command as workaround:
+ ``CFLAGS="-Wno-array-bounds" LDFLAGS="--no-warn-rwx-segments"``
+
+**NXP's imx-atf**
+
+1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: lf_v2.6
+2. Build
+
+ .. code-block:: bash
+
+ $ make PLAT=imx8mp CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31
+ $ cp build/imx8mp/release/bl31.bin $(builddir)
+
+.. note::
+
+ *builddir* is U-Boot's build directory (source directory for in-tree builds)
+
+**Mainline TF-A**
+
+1. Get TF-A from: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/, tag: v2.4
+2. Build
+
+ .. code-block:: bash
+
+ $ make PLAT=imx8mp CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31
+ $ cp build/imx8mp/release/bl31.bin $(builddir)
+
+Get the DDR firmware
+^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.18.bin
+ $ chmod +x firmware-imx-8.18.bin
+ $ ./firmware-imx-8.18.bin
+ $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin $(builddir)
+ $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin $(builddir)
+ $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin $(builddir)
+ $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin $(builddir)
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+ $ make kontron-osm-s-mx8mp_defconfig
+ $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Copy the flash.bin to SD card at an offset of 32 KiB:
+
+.. code-block:: bash
+
+ $ dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc
+
+Boot
+^^^^
+
+Put the SD card in the slot on the board and apply power. Check the serial
+console for output.
+
+Further Information
+-------------------
+
+The bootloader configuration is setup to be used with kernel FIT images. Legacy
+images might not be working out of the box.
+
+Please see https://docs.kontron-electronics.de for further vendor documentation.
diff --git a/include/configs/kontron-osm-s-mx8mp.h b/include/configs/kontron-osm-s-mx8mp.h
new file mode 100644
index 00000000000..24b07842bb6
--- /dev/null
+++ b/include/configs/kontron-osm-s-mx8mp.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 Kontron Electronics GmbH
+ *
+ * Configuration settings for the Kontron OSM-S/BL i.MX8M Plus boards and modules.
+ */
+#ifndef __KONTRON_MX8MP_CONFIG_H
+#define __KONTRON_MX8MP_CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <linux/sizes.h>
+
+/* RAM */
+#define PHYS_SDRAM DDR_CSD1_BASE_ADDR
+#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
+#define PHYS_SDRAM_2 0x100000000
+#define PHYS_SDRAM_2_SIZE (SZ_1G + SZ_4G)
+#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
+
+#define CFG_SYS_INIT_RAM_ADDR 0x40000000
+#define CFG_SYS_INIT_RAM_SIZE SZ_512K
+
+/* Board and environment settings */
+
+#ifdef CONFIG_USB_EHCI_HCD
+#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CFG_MXC_USB_FLAGS 0
+#endif
+
+#endif /* __KONTRON_MX8MP_CONFIG_H */
--
2.51.0
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