[PATCH v5 02/13] arm: mach-k3: Kconfig: Add symbols for IO+DDR Low Power Mode

[Dhruva Gole]

On Nov 10, 2025 at 21:10:26 +0100, Markus Schneider-Pargmann (TI.com) wrote:
> There is one new symbol to enable support to resume from IO+DDR where
> the SoC is turned off and DDR is in self-refresh.
> 
> The other symbol is the address of a memory region to be used to store
> meta data. This has to be the same address as is used by the firmware.

$title and here as well, sorry but I am just a bit confused, what/where is the
other symbol?

> 
> Tested-by: Anshul Dalal <anshuld at ti.com>
> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp at baylibre.com>
> ---
>  arch/arm/mach-k3/Kconfig | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> index 1b8c0b1eb968f0414107c0bf3142f744ce8364c8..4b7cef64935c7b403051c080eba7bdb48f727bf1 100644
> --- a/arch/arm/mach-k3/Kconfig
> +++ b/arch/arm/mach-k3/Kconfig
> @@ -148,6 +148,14 @@ config K3_DM_FW
>  	  bootloader, it makes RM and PM services not being available
>  	  during R5 SPL execution time.
>  
> +config K3_IODDR

I see only 1 symbol - ie. this K3_IODDR throughout?

> +	bool "Enable IO+DDR Low Power Mode support"
> +	depends on SPL && (SOC_K3_AM62A7 || SOC_K3_AM62P5)
> +	help
> +	  Enable support for IO+DDR Low Power Mode. If this is enabled and a
> +	  resume from IO+DDR is detected, metadata in the DDR is used to
> +	  restore TIFS and resume DM.
> +
>  config K3_X509_SWRV
>  	int "SWRV for X509 certificate used for boot images"
>  	default 1
> 
> -- 
> 2.51.0
> 

-- 
Best regards,
Dhruva Gole
Texas Instruments Incorporated