[PATCH v2 01/26] arm: socfpga: agilex5: Add new driver model for system manager in Agilex5

[Chee, Tien Fong]

Hi,

On 14/11/2025 6:54 pm, Jan Kiszka wrote:
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>
> On 19.02.25 07:37, Chee, Tien Fong wrote:
>>
>> -----Original Message-----
>> From: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at intel.com>
>> Sent: Tuesday, February 18, 2025 4:35 PM
>> To: u-boot at lists.denx.de
>> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Tien Fong Chee <tien.fong.chee at altera.com>; Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>; Tingting Meng <tingting.meng at altera.com>; Boon Khai Ng <boon.khai.ng at altera.com>; Kok Kiang Hea <kok.kiang.hea at altera.com>; Chee, Tien Fong <tien.fong.chee at intel.com>
>> Subject: [PATCH v2 01/26] arm: socfpga: agilex5: Add new driver model for system manager in Agilex5
>>
>> From: Tien Fong Chee <tien.fong.chee at intel.com>
>>
>> Initial creation of new system manager driver.
>>
>> Add supports for the SOCFPGA System Manager Register block which aggregates different peripheral function into one area.
>> On 64 bit ARM parts, the system manager only can be accessed during
>> EL3 mode, this driver model provide user the high level access to system register and abstract user from low level access.
>>
>> The base address of system manager can be retrieved using DT framework through the System Manager driver.
>>
>> Signed-off-by: Tien Fong Chee <tien.fong.chee at altera.com>
>> Signed-off-by: Boon Khai Ng <boon.khai.ng at altera.com>
>>
>> ---
>>
>> v1->v2
>> - Implement system manager driver to move towards DT probing
>> ---
>>   arch/arm/mach-socfpga/Makefile                |   3 +-
>>   arch/arm/mach-socfpga/altera-sysmgr.c         | 113 ++++++++++++++++
>>   .../mach-socfpga/include/mach/altera-sysmgr.h |  16 +++
>>   arch/arm/mach-socfpga/include/mach/misc.h     |   2 +
>>   .../include/mach/system_manager_soc64.h       | 128 ++++++++++++------
>>   arch/arm/mach-socfpga/misc.c                  |  18 ++-
>>   board/intel/agilex5-socdk/Makefile            |   7 +
>>   board/intel/agilex5-socdk/socfpga.c           |  12 ++
>>   configs/socfpga_agilex5_defconfig             |   1 +
>>   9 files changed, 250 insertions(+), 50 deletions(-)  create mode 100644 arch/arm/mach-socfpga/altera-sysmgr.c
>>   create mode 100644 arch/arm/mach-socfpga/include/mach/altera-sysmgr.h
>>   create mode 100644 board/intel/agilex5-socdk/Makefile
>>   create mode 100644 board/intel/agilex5-socdk/socfpga.c
>>
>> [...]
>>
>> Reviewed-by: Tien Fong Chee <tien.fong.chee at intel.com>
>>
>> Best regards,
>> Tien Fong
> This very likely broke all targets except for the agilex5. It definitely
> broke the cyclone5.
>
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index 9d464307665..e0ed1b8e954 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -248,6 +248,12 @@ void socfpga_get_managers_addr(void)
>          if (ret)
>                  hang();
>
> +#ifndef CONFIG_TARGET_SOCFPGA_AGILEX
> +       ret = socfpga_get_base_addr("altr,sys-mgr", &socfpga_sysmgr_base);
> +       if (ret)
> +               hang();
> +#endif
> +
>   #ifdef CONFIG_TARGET_SOCFPGA_AGILEX
>          ret = socfpga_get_base_addr("intel,agilex-clkmgr",
>                                      &socfpga_clkmgr_base);
>
> Arent't you testing for older designs anymore?


You are correct , the patch as-is focuses on Agilex5 and does not fully 
account for older platforms like Cyclone5. Our initial plan assumed 
users would follow the Altera official release repo at 
https://github.com/altera-fpga/u-boot-socfpga , where we are gradually 
migrating platform devices, including Agilex, Agilex7M, and Agilex5 to 
the driver model stage by stage.

To clarify, as of today, the platform devices for Agilex, Agilex7M, and 
Agilex5 have already been migrated to the driver model. Older platforms 
like Cyclone5 still follow the previous non-driver model path.

We are now aware that some users are still using mainline U-Boot. To 
address this, we will update mainline to ensure that existing platforms, 
including Cyclone5, continue to work as before while maintaining support 
for the newly migrated Agilex platforms.

We appreciate your patience and will make sure mainline remains 
functional for all currently supported platforms during this staged 
migration.

Thanks,
Tien Fong


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