[PATCH] rockchip: rk3588: Map SCMI shared memory area as non-cacheable

[Kever Yang]

On 2025/11/16 09:45, Jonas Karlman wrote:
> The SCMI shared memory area is no longer automatically marked as
> non-cacheable after the commit a5a0134570c8 ("firmware: scmi: Drop
> mmu_set_region_dcache_behaviour() misuse").
>
> This change in behavior cause Rockchip RK3588 boards to fail boot with:
>
>    SoC:   RK3588
>    DRAM:  8 GiB
>    scmi-over-smccc scmi: Channel unexpectedly busy
>    scmi_base_drv scmi-base.0: getting protocol version failed
>    scmi-over-smccc scmi: failed to probe base protocol
>    initcall_run_r(): initcall initr_dm() failed
>    ### ERROR ### Please RESET the board ###
>
> Update the memory mapping on RK3588 to mark the SCMI shared memory area
> as non-cacheable to fix the SCMI shared memory based transport issue
> that prevented RK3588 boards from booting.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/mach-rockchip/rk3588/rk3588.c | 15 ++++++++++++++-
>   1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
> index c01a40020896..55d2caab4fec 100644
> --- a/arch/arm/mach-rockchip/rk3588/rk3588.c
> +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
> @@ -63,7 +63,20 @@ static struct mm_region rk3588_mem_map[] = {
>   	{
>   		.virt = 0x0UL,
>   		.phys = 0x0UL,
> -		.size = 0xf0000000UL,
> +		.size = 0x10f000UL,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> +			 PTE_BLOCK_INNER_SHARE
> +	}, {
> +		/* SCMI shared memory area must be mapped as non-cacheable. */
> +		.virt = 0x10f000UL,
> +		.phys = 0x10f000UL,
> +		.size = 0x1000UL,
> +		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
> +			 PTE_BLOCK_INNER_SHARE
> +	}, {
> +		.virt = 0x110000UL,
> +		.phys = 0x110000UL,
> +		.size = 0xefef0000UL,
>   		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
>   			 PTE_BLOCK_INNER_SHARE
>   	}, {