[PATCH v1 2/6] drivers: usb: dwc3: Add delay after core soft reset

[Balaji Selvanathan]

Hi Marek,

Thanks for the feedback. Pls find replies to your queries below.

Thanks,

Balaji

On 11/21/2025 7:36 PM, Marek Vasut wrote:
> On 11/19/25 4:25 PM, Balaji Selvanathan wrote:
>> Add a 100 ms delay after clearing the core soft reset bit to ensure
>> the DWC3 controller has sufficient time to complete its reset
>> sequence before subsequent register accesses.
>>
>> Without this delay, USB initialization can fail on some Qualcomm
>> platforms, particularly when using super-speed capable PHYs like
>> the QMP USB3-DP Combo PHY on SC7280/QCM6490.
>>
>> The change is taken from following upstream Linux implementation:
>> https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/usb/dwc3/core.c?id=3d25d46a255a83f94d7d4d4216f38aafc8e116b0 
>>
>
> Is this the correct commit ?
>
> 3d25d46a255a ("pmdomain: qcom: rpmhpd: Add rpmhpd support for SM8750")
>
> It seems it is not, so which commit added that 100ms delay to Linux ?
Sorry, this is the correct commit that adds the delay: 
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/usb/dwc3/core.c?id=f88359e1588b85cf0; 
Have updated the same in this respin:
https://lore.kernel.org/u-boot/20251124155503.2839766-3-balaji.selvanathan@oss.qualcomm.com/ 

>
>> Signed-off-by: Balaji Selvanathan <balaji.selvanathan at oss.qualcomm.com>
>> ---
>>   drivers/usb/dwc3/core.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 847fa1f82c3..ff0bca0dd8e 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -94,6 +94,8 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
>>       reg &= ~DWC3_GCTL_CORESOFTRESET;
>>       dwc3_writel(dwc->regs, DWC3_GCTL, reg);
>>   +    mdelay(100);
>> +
> Is this DWC3 specific or QCOM specific delay ?
It is DWC3 specific delay.