[PATCH v5] Altera SoCFpga Boot Stall Fix

[Chee, Tien Fong]

On 15/11/2025 12:04 am, Brian Sune wrote:
> [CAUTION: This email is from outside your organization. Unless you trust the sender, do not click on links or open attachments as it may be a fraudulent email attempting to steal your information and/or compromise your computer.]
>
> Since U-Boot 2025.07 pure SD Card
> boot no longer works. Now Altera released 2025.07
> shows the different on the u-boot files.
> After testing, the major root case is
> get_managers_addr. And this patch fix the
> SD boot stall via pulling from offical.
>
> Signed-off-by: Brian Sune <briansune at gmail.com>
> ---
>   arch/arm/mach-socfpga/misc.c | 13 +++++++++++--
>   1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index 76747c2196a..07694107c8a 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -222,7 +222,7 @@ static int do_bridge(struct cmd_tbl *cmdtp, int flag, int argc,
>   }
>
>   U_BOOT_CMD(bridge, 3, 1, do_bridge,
> -          "SoCFPGA HPS FPGA bridge control",
> +          "GEN5 SoCFPGA HPS FPGA bridge control",
>             "enable [mask] - Enable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2) bridges\n"
>             "bridge disable [mask] - Disable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2) bridges\n"
>             ""
> @@ -261,7 +261,16 @@ void socfpga_get_managers_addr(void)
>          if (ret)
>                  hang();
>
> -       else if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
> +       if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) &&
> +           !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M) &&
> +           !IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)) {
> +               ret = socfpga_get_base_addr("altr,sys-mgr",
> +                                           &socfpga_sysmgr_base);
> +               if (ret)
> +                       hang();
> +       }
> +
> +       if (IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X))
>                  ret = socfpga_get_base_addr("intel,n5x-clkmgr",
>                                              &socfpga_clkmgr_base);
>          else if (!IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) &&
> --
> 2.34.1


Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong



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