[PATCH v3] SDRAM Calibration Failed fix for GEN5 SoCFPGA

[Quentin Schulz]

Hi Brian,

On 11/26/25 11:55 AM, Sune Brian wrote:
>> Yes, but I only want at least one board this happens on so we can try
>> figure out exactly what happens with this watchdog.
> 
> I am a bit confused. Sounds like this is affecting the entire U-Boot?

I believe so.

> Isn't this just a Cyclone V GEN5 socfpga issue?
> 

I don't think so.

I think the issue is that CONFIG_WATCHDOG selects CYCLIC but only 
implies SPL_CYCLIC and CONFIG_SPL_WATCHDOG does nothing wrt SPL_CYLIC. 
ARCH_SOCFPGA selects SPL_WATCHDOG so it is always enabled, but 
SPL_CYCLIC may not always be enabled.

> It is a very generic setup.
> clone from fresh
> 
> make clean
> make mrproper
> make socfpga_cyclone5_defconfig
> make prepare
> 
> Now please cp .config to .config_default
> 
> Ok now
> make menuconfig
> /WDT turn on and save

Only WDT or also SPL_WDT?

> make menuconfig
> turn all those you have enabled

Which ones?

> save again.
> 
> then gvimdiff .config .config_default
> 
> You will see what I meant.
> 

Can you run "make savedefconfig" after your "save again" step and copy 
the content of the file called "defconfig" that was just generated in a 
mail? That would really help me, thanks!

Cheers,
Quentin