[PATCH 2/2] arch: arm: dts: k3-am642-phyboard-electra: Drop bootph properties

Wadim Egorov w.egorov at phytec.de
Thu Nov 27 15:04:28 CET 2025


Remove bootph properties no longer needed. These are now handled
in upstream Linux device trees.

While at it, drop the vtt-supply which is a leftover from the
very initial prototype of this board.

Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
---
 .../k3-am642-phyboard-electra-rdk-u-boot.dtsi | 104 ------------------
 arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts  |  44 --------
 2 files changed, 148 deletions(-)

diff --git a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
index 56547cbd28a..0c2bce28245 100644
--- a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
@@ -17,34 +17,6 @@
 		stdout-path = "serial2:115200n8";
 		tick-timer = &main_timer0;
 	};
-
-	memory at 80000000 {
-		bootph-all;
-	};
-};
-
-&cbass_main {
-	bootph-all;
-};
-
-&dmsc {
-	bootph-all;
-};
-
-&dmss {
-	bootph-all;
-};
-
-&k3_clks {
-	bootph-all;
-};
-
-&k3_pds {
-	bootph-all;
-};
-
-&k3_reset {
-	bootph-all;
 };
 
 &main_bcdma {
@@ -61,68 +33,16 @@
 		    "cfg", "tchan", "rchan";
 };
 
-&main_conf {
-	bootph-all;
-	chipid at 14 {
-		bootph-all;
-	};
-};
-
-&main_gpio0 {
-	bootph-all;
-};
-
-&main_i2c0 {
-	bootph-all;
-};
-
-&main_i2c0_pins_default {
-	bootph-all;
-};
-
-&main_mmc1_pins_default {
-	bootph-all;
-};
-
 &main_pktdma {
 	bootph-all;
-	reg = <0x00 0x485c0000 0x00 0x100>,
-	      <0x00 0x4a800000 0x00 0x20000>,
-	      <0x00 0x4aa00000 0x00 0x40000>,
-	      <0x00 0x4b800000 0x00 0x400000>,
-	      <0x00 0x485e0000 0x00 0x20000>,
-	      <0x00 0x484a0000 0x00 0x4000>,
-	      <0x00 0x484c0000 0x00 0x2000>,
-	      <0x00 0x48430000 0x00 0x4000>;
-	reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg",
-		    "tchan", "rchan", "rflow";
-};
-
-&main_pmx0 {
-	bootph-all;
 };
 
 &main_timer0 {
-	bootph-all;
 	clock-frequency = <200000000>;
 };
 
-&main_uart0 {
-	bootph-all;
-};
-
-&main_uart0_pins_default {
-	bootph-all;
-};
-
-&main_usb0_pins_default {
-	bootph-all;
-};
-
 &ospi0 {
-	bootph-all;
 	flash at 0 {
-		bootph-all;
 		partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;
@@ -152,30 +72,6 @@
 	};
 };
 
-&ospi0_pins_default {
-	bootph-all;
-};
-
 &main_rti1 {
 	status = "disabled";
 };
-
-&sdhci0 {
-	bootph-all;
-};
-
-&sdhci1 {
-	bootph-all;
-};
-
-&secure_proxy_main {
-	bootph-all;
-};
-
-&usbss0 {
-	bootph-all;
-};
-
-&usb0 {
-	bootph-all;
-};
diff --git a/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts
index 32a10b24327..d27fc7fa882 100644
--- a/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts
+++ b/arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts
@@ -45,20 +45,6 @@
 		clock-frequency = <200000000>;
 		bootph-pre-ram;
 	};
-
-	vtt_supply: vtt-supply {
-		compatible = "regulator-fixed";
-		regulator-name = "vtt";
-		pinctrl-names = "default";
-		pinctrl-0 = <&ddr_vtt_pins_default>;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		gpios = <&main_gpio0 14 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-always-on;
-		regulator-boot-on;
-		bootph-pre-ram;
-	};
 };
 
 &cbass_main {
@@ -70,10 +56,6 @@
 	};
 };
 
-&cbass_mcu {
-	bootph-pre-ram;
-};
-
 &dmsc {
 	mboxes= <&secure_proxy_main 0>,
 		<&secure_proxy_main 1>,
@@ -83,24 +65,6 @@
 	ti,secure-host;
 };
 
-&main_esm {
-	bootph-pre-ram;
-};
-
-&main_gpio0 {
-	bootph-pre-ram;
-};
-
-&main_pmx0 {
-	bootph-pre-ram;
-	ddr_vtt_pins_default: ddr-vtt-default-pins {
-		bootph-pre-ram;
-		pinctrl-single,pins = <
-			AM64X_IOPAD(0x0038, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN3.GPIO0_14 */
-		>;
-	};
-};
-
 /* timer init is called as part of rproc_start() while
  * starting System Firmware, so any clock/power-domain
  * operations will fail as SYSFW is not yet up and running.
@@ -126,14 +90,6 @@
 	/delete-property/ clock-names;
 };
 
-&mcu_esm {
-	bootph-pre-ram;
-};
-
-&memorycontroller {
-	vtt-supply = <&vtt_supply>;
-};
-
 &ospi0 {
 	reg = <0x00 0x0fc40000 0x00 0x100>,
 	      <0x00 0x60000000 0x00 0x08000000>;
-- 
2.48.1



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