[PATCH] common: spl: Enable Instruction cache after relocation in board_init_r
Kumar, Udit
u-kumar1 at ti.com
Sat Nov 29 05:26:44 CET 2025
On 11/29/2025 12:54 AM, Ernest Van Hoecke wrote:
> On Wed, Nov 26, 2025 at 06:34:15PM +0530, Kumar, Udit wrote:
>> Thanks Ernest for reviving this patch ,
>>
>> Changes in arch/arm/mach-k3/common.c seems good to me.
>>
>> but common/spl/spl.c can not pushed in generic way, I can think of few
>> platforms running SPL w/o caches on.
>>
> Hi Udit,
>
> Thanks for your prompt reply and input. I have now tested this patch but
> with the enable_caches in common/spl/spl.c dropped, and everything looks
> great to me. I will continue running the tests over the weekend, but can
> confirm that this change seems unnecessary to fix the issue we saw with
> sporadic boot failures.
Thanks again Ernest,
Ideally, I prefer to revert commit sha 52a86e69e20.
Adding more TI folks for any objection on reverting sha 52a86e69e20
>
> A v2 that only touches mach-k3/common.c would be suitable. If you
> prefer, I have a patch ready that we can send. I don't believe much
Unfortunately, only change in mach-k3/common.c will not be enough to fix
the issue.
we need to clean-caches at board_init_r stage, and which is common code.
> functionality is lost by simply dropping the spl.c line, platforms can
> enable caches themselves as they want.
>
> Kind regards,
> Ernest
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