[PATCH v4 01/10] riscv: Add initial support for P8700 SoC

[Yao Zi]

On Tue, Aug 19, 2025 at 10:31:42AM +0000, Uros Stajic wrote:
> From: Chao-ying Fu <cfu at mips.com>
> 
> Add initial platform support for the P8700-F, a high-performance
> multi-core RV64GC SoC with optional multi-cluster configuration and
> hardware multithreading.
> 
> This patch introduces the initial platform code necessary to support
> the P8700 CPU in U-Boot.
> 
> Signed-off-by: Chao-ying Fu <cfu at mips.com>
> Signed-off-by: Uros Stajic <uros.stajic at htecgroup.com>
> ---
>  arch/riscv/Kconfig                          |   1 +
>  arch/riscv/cpu/p8700/Kconfig                |  14 ++
>  arch/riscv/cpu/p8700/Makefile               |   9 ++
>  arch/riscv/cpu/p8700/cache.c                |  93 +++++++++++
>  arch/riscv/cpu/p8700/cpu.c                  |  13 ++
>  arch/riscv/cpu/p8700/dram.c                 |  37 +++++
>  arch/riscv/cpu/p8700/p8700_platform_setup.S | 169 ++++++++++++++++++++
>  arch/riscv/include/asm/arch-p8700/p8700.h   | 110 +++++++++++++
>  8 files changed, 446 insertions(+)
>  create mode 100644 arch/riscv/cpu/p8700/Kconfig
>  create mode 100644 arch/riscv/cpu/p8700/Makefile
>  create mode 100644 arch/riscv/cpu/p8700/cache.c
>  create mode 100644 arch/riscv/cpu/p8700/cpu.c
>  create mode 100644 arch/riscv/cpu/p8700/dram.c
>  create mode 100644 arch/riscv/cpu/p8700/p8700_platform_setup.S
>  create mode 100644 arch/riscv/include/asm/arch-p8700/p8700.h
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 04eb0e6f23c..4eaf0e3db71 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -131,6 +131,7 @@ source "arch/riscv/cpu/jh7110/Kconfig"
>  source "arch/riscv/cpu/k1/Kconfig"
>  source "arch/riscv/cpu/k230/Kconfig"
>  source "arch/riscv/cpu/th1520/Kconfig"
> +source "arch/riscv/cpu/p8700/Kconfig"
>  
>  # architecture-specific options below
>  
> diff --git a/arch/riscv/cpu/p8700/Kconfig b/arch/riscv/cpu/p8700/Kconfig
> new file mode 100644
> index 00000000000..7023575a6be
> --- /dev/null
> +++ b/arch/riscv/cpu/p8700/Kconfig
> @@ -0,0 +1,14 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2021, Chao-ying Fu <cfu at mips.com>
> +
> +config P8700_RISCV
> +	bool
> +	select ARCH_EARLY_INIT_R
> +	imply CPU
> +	imply CPU_RISCV
> +	imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)

SIFIVE_CLINT has been renamed as RISCV_ACLINT back to 2023, and in
PATCH 2 you change SIFIVE_CLINT to RISCV_ACLINT. I think you should
squash the change into PATCH 1.

> +	imply CMD_CPU
> +	imply SPL_CPU_SUPPORT
> +	imply SPL_OPENSBI
> +	imply SPL_LOAD_FIT

...

> diff --git a/arch/riscv/cpu/p8700/p8700_platform_setup.S b/arch/riscv/cpu/p8700/p8700_platform_setup.S
> new file mode 100644
> index 00000000000..7c4475a03dd
> --- /dev/null
> +++ b/arch/riscv/cpu/p8700/p8700_platform_setup.S

Could this file be converted to C language? Then it'll be easier to
maintain. I think nothing prevents this if you could put the
initialization off until harts_early_init().

Futhermore I don't see this file is included in any of your Makefile,
which is suspicious.

...

> diff --git a/arch/riscv/include/asm/arch-p8700/p8700.h b/arch/riscv/include/asm/arch-p8700/p8700.h
> new file mode 100644
> index 00000000000..5ca9b4b9497
> --- /dev/null
> +++ b/arch/riscv/include/asm/arch-p8700/p8700.h
> @@ -0,0 +1,110 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2021, Chao-ying Fu <cfu at mips.com>
> + */
> +
> +#ifndef __P8700_H__
> +#define __P8700_H__
> +
> +#define CSR_MIPSCONFIG7		0x7d7
> +#define CSR_PMACFG0			0x7e0
> +
> +#define MHARTID_HART_SHIFT	0
> +#define MHARTID_HART_MASK	0xf
> +#define MHARTID_CORE_SHIFT	4
> +#define MHARTID_CORE_MASK	0xff
> +#define MHARTID_CLUSTER_SHIFT	16
> +#define MHARTID_CLUSTER_MASK	0xf
> +
> +#define MARCHID_UARCH_SHIFT	0
> +#define MARCHID_UARCH_MASK	0xff
> +#define MARCHID_CLASS_SHIFT	8
> +#define MARCHID_CLASS_MASK	0xff

If you convert p8700_platform_setup.S to a C file, these macros could be
simplified with GENMASK() and FIELD_GET/PUT().

Best regards,
Yao Zi