[PATCH 1/6] clk: exynos: provide device pointer to clk_register_* functions

[Kaustabh Chakraborty]

The device pointer set as NULL causes problems when clock banks depend
on clocks from another clock bank. In such case, the appropriate clock
needs to be resolved from OF phandle arguments, which is not possible if
the associated device is not provided. Make necessary changes to make
the correct device pointer available.

Signed-off-by: Kaustabh Chakraborty <kauschluss at disroot.org>
---
 drivers/clk/exynos/clk-pll.c |  3 ++-
 drivers/clk/exynos/clk-pll.h |  3 ++-
 drivers/clk/exynos/clk.c     | 43 ++++++++++++++++++++++++-------------------
 3 files changed, 28 insertions(+), 21 deletions(-)

diff --git a/drivers/clk/exynos/clk-pll.c b/drivers/clk/exynos/clk-pll.c
index 542d577eaa6f667ba4fb31590eee01b034b22007..fc7e638134a9529edac644d1dfff173adc3e1c5d 100644
--- a/drivers/clk/exynos/clk-pll.c
+++ b/drivers/clk/exynos/clk-pll.c
@@ -136,7 +136,8 @@ static struct clk *_samsung_clk_register_pll(void __iomem *base,
 	return clk;
 }
 
-void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
+void samsung_clk_register_pll(struct udevice *dev, void __iomem *base,
+			      unsigned int cmu_id,
 			      const struct samsung_pll_clock *clk_list,
 			      unsigned int nr_clk)
 {
diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index bdc94e7624d21a5da95282f686354da0fc771826..22cc15a40a4f8933d0e79da864f4f50b732c86a4 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -22,7 +22,8 @@ enum samsung_pll_type {
 	pll_0831x,
 };
 
-void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
+void samsung_clk_register_pll(struct udevice *dev, void __iomem *base,
+			      unsigned int cmu_id,
 			      const struct samsung_pll_clock *clk_list,
 			      unsigned int nr_clk);
 
diff --git a/drivers/clk/exynos/clk.c b/drivers/clk/exynos/clk.c
index 943e8bd0189236f4e6035aaf2ac612075a7ee126..2f5a3de65631dfba1b69c4e877cb54ec254a5399 100644
--- a/drivers/clk/exynos/clk.c
+++ b/drivers/clk/exynos/clk.c
@@ -10,7 +10,8 @@
 #include <dm.h>
 #include "clk.h"
 
-static void samsung_clk_register_mux(void __iomem *base, unsigned int cmu_id,
+static void samsung_clk_register_mux(struct udevice *dev, void __iomem *base,
+				     unsigned int cmu_id,
 				     const struct samsung_mux_clock *clk_list,
 				     unsigned int nr_clk)
 {
@@ -22,15 +23,17 @@ static void samsung_clk_register_mux(void __iomem *base, unsigned int cmu_id,
 		unsigned long clk_id;
 
 		m = &clk_list[cnt];
-		clk = clk_register_mux(NULL, m->name, m->parent_names,
-			m->num_parents, m->flags, base + m->offset, m->shift,
-			m->width, m->mux_flags);
+		clk = clk_register_mux(dev, m->name, m->parent_names,
+				       m->num_parents, m->flags,
+				       base + m->offset, m->shift, m->width,
+				       m->mux_flags);
 		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, m->id);
 		clk_dm(clk_id, clk);
 	}
 }
 
-static void samsung_clk_register_div(void __iomem *base, unsigned int cmu_id,
+static void samsung_clk_register_div(struct udevice *dev, void __iomem *base,
+				     unsigned int cmu_id,
 				     const struct samsung_div_clock *clk_list,
 				     unsigned int nr_clk)
 {
@@ -42,15 +45,16 @@ static void samsung_clk_register_div(void __iomem *base, unsigned int cmu_id,
 		unsigned long clk_id;
 
 		d = &clk_list[cnt];
-		clk = clk_register_divider(NULL, d->name, d->parent_name,
-			d->flags, base + d->offset, d->shift,
-			d->width, d->div_flags);
+		clk = clk_register_divider(dev, d->name, d->parent_name,
+					   d->flags, base + d->offset, d->shift,
+					   d->width, d->div_flags);
 		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, d->id);
 		clk_dm(clk_id, clk);
 	}
 }
 
-static void samsung_clk_register_gate(void __iomem *base, unsigned int cmu_id,
+static void samsung_clk_register_gate(struct udevice *dev, void __iomem *base,
+				      unsigned int cmu_id,
 				      const struct samsung_gate_clock *clk_list,
 				      unsigned int nr_clk)
 {
@@ -62,16 +66,16 @@ static void samsung_clk_register_gate(void __iomem *base, unsigned int cmu_id,
 		unsigned long clk_id;
 
 		g = &clk_list[cnt];
-		clk = clk_register_gate(NULL, g->name, g->parent_name,
-			g->flags, base + g->offset, g->bit_idx,
-			g->gate_flags, NULL);
+		clk = clk_register_gate(dev, g->name, g->parent_name,
+					g->flags, base + g->offset, g->bit_idx,
+					g->gate_flags, NULL);
 		clk_id = SAMSUNG_TO_CLK_ID(cmu_id, g->id);
 		clk_dm(clk_id, clk);
 	}
 }
 
-typedef void (*samsung_clk_register_fn)(void __iomem *base, unsigned int cmu_id,
-					const void *clk_list,
+typedef void (*samsung_clk_register_fn)(struct udevice *dev, void __iomem *base,
+					unsigned int cmu_id, const void *clk_list,
 					unsigned int nr_clk);
 
 static const samsung_clk_register_fn samsung_clk_register_fns[] = {
@@ -91,16 +95,17 @@ static const samsung_clk_register_fn samsung_clk_register_fns[] = {
  * Having the array of clock groups @clk_groups makes it possible to keep a
  * correct clocks registration order.
  */
-static void samsung_cmu_register_clocks(void __iomem *base, unsigned int cmu_id,
-				const struct samsung_clk_group *clk_groups,
-				unsigned int nr_groups)
+static void samsung_cmu_register_clocks(struct udevice *dev, void __iomem *base,
+					unsigned int cmu_id,
+					const struct samsung_clk_group *clk_groups,
+					unsigned int nr_groups)
 {
 	unsigned int i;
 
 	for (i = 0; i < nr_groups; i++) {
 		const struct samsung_clk_group *g = &clk_groups[i];
 
-		samsung_clk_register_fns[g->type](base, cmu_id,
+		samsung_clk_register_fns[g->type](dev, base, cmu_id,
 						  g->clk_list, g->nr_clk);
 	}
 }
@@ -124,7 +129,7 @@ int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
 	if (!base)
 		return -EINVAL;
 
-	samsung_cmu_register_clocks(base, cmu_id, clk_groups, nr_groups);
+	samsung_cmu_register_clocks(dev, base, cmu_id, clk_groups, nr_groups);
 
 	return 0;
 }

-- 
2.51.0