[PATCH] arm64: renesas: Extend stub PSCI implementation to R-Car Gen5

[Marek Vasut]

From: Hai Pham <hai.pham.ud at renesas.com>

Extend the stub PSCI implementation with support for R-Car Gen5.
R-Car Gen5 uses different register to perform reset, therefore
add a compile-time conditional. This is __secure code, therefore
the runtime SoC detection parts are not available to it, hence
the compile time conditional.

Signed-off-by: Hai Pham <hai.pham.ud at renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org> # Tweak commit message
---
Cc: Hai Pham <hai.pham.ud at renesas.com>
Cc: Khanh Le <khanh.le.xr at renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
Cc: Paul Barker <paul.barker.ct at bp.renesas.com>
Cc: Simon Glass <sjg at chromium.org>
Cc: Tom Rini <trini at konsulko.com>
Cc: u-boot at lists.denx.de
---
 arch/arm/mach-renesas/psci-rcar64.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-renesas/psci-rcar64.c b/arch/arm/mach-renesas/psci-rcar64.c
index 459dd55ff45..22c2ee045cc 100644
--- a/arch/arm/mach-renesas/psci-rcar64.c
+++ b/arch/arm/mach-renesas/psci-rcar64.c
@@ -32,7 +32,12 @@ u32 __secure psci_version(void)
 
 void __secure __noreturn psci_system_reset(void)
 {
+#if defined(CONFIG_RCAR_GEN5)
+	writel(RST_KCPROT_DIS, RST_RESKCPROT0);
+	writel(0x1, RST_SWSRES1A);
+#else
 	writel(RST_SPRES, RST_SRESCR0);
+#endif
 
 	while (1)
 		;
-- 
2.51.0