[PATCH v3 1/6] imx9: Add support for saving DDR training data to NVM
Simona Toaca
simona.toaca at oss.nxp.com
Mon Apr 6 10:39:36 CEST 2026
Hi Simon,
On Sun, Apr 05, 2026 at 05:49:56AM -0600, Simon Glass wrote:
> Hi,
>
> On Thu, 2 Apr 2026 at 03:29, Simona Toaca (OSS)
> <simona.toaca at oss.nxp.com> wrote:
> >
> > From: Simona Toaca <simona.toaca at nxp.com>
> >
> > DDR training data can be saved to NVM and be available
> > to OEI at boot time, which will trigger QuickBoot flow.
> >
> > U-Boot only checks for data integrity (CRC32), while
> > OEI is in charge of authentication when it tries to
> > load the data from NVM.
> >
> > On iMX95 A0/A1, 'authentication' is done via another
> > CRC32. On the other boards, authentication is done by
> > using ELE to check the MAC stored in the ddrphy_qb_state
> > structure.
> >
> > Supported platforms: iMX94, iMX95, iMX952 (using OEI)
> > Supported storage types: eMMC, SD, SPI flash.
> >
> > Signed-off-by: Viorel Suman <viorel.suman at nxp.com>
> > Signed-off-by: Ye Li <ye.li at nxp.com>
> > Signed-off-by: Simona Toaca <simona.toaca at nxp.com>
> > ---
> > arch/arm/include/asm/arch-imx9/ddr.h | 48 +++-
> > arch/arm/include/asm/mach-imx/qb.h | 15 ++
> > arch/arm/mach-imx/imx9/Makefile | 6 +-
> > arch/arm/mach-imx/imx9/qb.c | 379 +++++++++++++++++++++++++++
> > arch/arm/mach-imx/imx9/scmi/soc.c | 7 +
> > drivers/ddr/imx/imx9/Kconfig | 7 +
> > 6 files changed, 459 insertions(+), 3 deletions(-)
> > create mode 100644 arch/arm/include/asm/mach-imx/qb.h
> > create mode 100644 arch/arm/mach-imx/imx9/qb.c
>
> Note that this feature is present on x86 boards already.
>
> I wonder if we could make this more generic? E.g. it could be a
> function of UCLASS_RAM ? I could do the x86 part to try it out if you
> like.
>
Can you please point me to the implementation for x86? This Quickboot
feature is specific to Synopsis DDR PHYs, and the location where we
save this data is specific to iMX9 series (since it is needed by OEI).
I need a bit more details about what you mean.
Thank you,
Simona
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