[PATCH 1/2] armv8: timer: Add option to use virtual counter at EL1

[Balaji Selvanathan]

Add CONFIG_ARMV8_TIMER_USE_VIRTUAL_COUNTER to allow platforms to use
the virtual counter (CNTVCT_EL0) instead of the physical counter
(CNTPCT_EL0) when running at EL1.

This addresses platforms where the hypervisor or EL2 firmware does
not configure CNTHCTL_EL2.EL1PCTEN, causing EL1 access to CNTPCT_EL0
to trap. The virtual counter is typically accessible without trapping
and provides equivalent functionality when CNTVOFF_EL2 is zero, as is
typical in bootloader environments.

The new Kconfig option is disabled by default to maintain existing
behavior on platforms where physical counter access works correctly.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan at oss.qualcomm.com>
---
 arch/arm/cpu/armv8/Kconfig         | 19 +++++++++++++++++++
 arch/arm/cpu/armv8/generic_timer.c | 13 +++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index dfc4ce851c3..00c7303e09d 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -12,6 +12,25 @@ config ARMV8_CNTFRQ_BROKEN
 	  does not set the CNTFRQ_EL0 frequency, and its not possible to
 	  set it from U-Boot either.
 
+config ARMV8_TIMER_USE_VIRTUAL_COUNTER
+	bool "Use virtual counter (CNTVCT_EL0) at EL1"
+	depends on SYS_ARCH_TIMER
+	help
+	  Say Y here if the platform's hypervisor/EL2 firmware does not
+	  configure CNTHCTL_EL2.EL1PCTEN to allow EL1 access to the physical
+	  counter (CNTPCT_EL0), causing traps when attempting to read it.
+
+	  This option makes the generic timer use the virtual counter
+	  (CNTVCT_EL0) when running at EL1, which is typically accessible
+	  without trapping.
+
+	  This is a workaround for platforms where the EL2 firmware cannot
+	  properly configure CNTHCTL_EL2. In most cases, the
+	  virtual counter provides equivalent functionality since CNTVOFF_EL2
+	  is typically zero in bootloader environments.
+
+	  If unsure, say N.
+
 config ARMV8_SPL_EXCEPTION_VECTORS
 	bool "Install crash dump exception vectors"
 	depends on SPL
diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index 744ab3b91e5..6dc98874504 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -86,7 +86,20 @@ unsigned long notrace timer_read_counter(void)
 	unsigned long cntpct;
 
 	isb();
+
+#ifdef CONFIG_ARMV8_TIMER_USE_VIRTUAL_COUNTER
+	/*
+	 * Use virtual counter (CNTVCT_EL0) at EL1 if configured.
+	 * This is a workaround for platforms where the hypervisor/EL2 firmware
+	 * does not configure CNTHCTL_EL2.EL1PCTEN, causing EL1 access to
+	 * CNTPCT_EL0 to trap. The virtual counter is typically accessible
+	 * without trapping and provides equivalent functionality when
+	 * CNTVOFF_EL2 is zero (as is typical in bootloader environments).
+	 */
+	asm volatile("mrs %0, cntvct_el0" : "=r" (cntpct));
+#else
 	asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
+#endif
 
 	return cntpct;
 }

-- 
2.34.1