[PATCH 1/2] serial: msm-geni: allow invalid clock

Casey Connolly casey.connolly at linaro.org
Wed Apr 8 11:16:24 CEST 2026


Hi Sumit,

On 07/04/2026 13:38, Sumit Garg wrote:
> On Fri, Mar 20, 2026 at 04:45:40PM +0100, Casey Connolly via B4 Relay wrote:
>> From: Casey Connolly <casey.connolly at linaro.org>
>>
>> Pre-relocation we probably won't have a clock but it's usually
>> been enabled for us already, or worst case we will enable it after
>> relocation.
>>
> 
> Not sure if this is the right approach, since the UART driver might just
> hang without clock being enabled. What's the motivation for this change?

Hmm, I didn't consider that. The motivation here is to handle CCF, since
we don't want to support clock pre-relocation. In pretty much all cases
today the serial clocks are already configured but you're right that we
ought not to depend on that.

I can't really think of another good solution than hardcoding this clock
configuration somewhere :/

Any ideas?

> 
> -Sumit
> 
>> Signed-off-by: Casey Connolly <casey.connolly at linaro.org>
>> ---
>>  drivers/serial/serial_msm_geni.c | 15 +++++----------
>>  1 file changed, 5 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
>> index bb5a2cb4d2cd..c37255f57d05 100644
>> --- a/drivers/serial/serial_msm_geni.c
>> +++ b/drivers/serial/serial_msm_geni.c
>> @@ -211,9 +211,9 @@ static int msm_serial_setbrg(struct udevice *dev, int baud)
>>  	}
>>  	ret = clk_set_rate(priv->se, clk_rate);
>>  	if (ret < 0) {
>>  		pr_err("%s: Couldn't set clock rate: %d\n", __func__, ret);
>> -		return ret;
>> +		return 0;
>>  	}
>>  	geni_serial_baud(priv->base, clk_div, baud);
>>  
>>  	return 0;
>> @@ -516,15 +516,14 @@ static int msm_serial_probe(struct udevice *dev)
>>  	int ret;
>>  	u32 proto;
>>  	struct clk *clk;
>>  
>> -	clk = devm_clk_get(dev, NULL);
>> -	if (IS_ERR(clk))
>> -		return PTR_ERR(clk);
>> -	priv->se = clk;
>> +	clk = devm_clk_get_optional(dev, NULL);
>> +	if (!IS_ERR(clk))
>> +		priv->se = clk;
>>  
>>  	/* Try enable clock */
>> -	ret = clk_enable(clk);
>> +	clk_enable(clk);
>>  
>>  	/* Check if firmware loading is needed (BT UART) */
>>  	proto = readl(priv->base + GENI_FW_REVISION_RO);
>>  	proto &= FW_REV_PROTOCOL_MSK;
>> @@ -546,12 +545,8 @@ static int msm_serial_probe(struct udevice *dev)
>>  	/* Don't actually probe non-debug UARTs */
>>  	if (ofnode_device_is_compatible(dev_ofnode(dev), "qcom,geni-uart"))
>>  		return -ENOENT;
>>  
>> -	/* Now handle clock enable return value */
>> -	if (ret)
>> -		return ret;
>> -
>>  	ret = geni_set_oversampling(dev);
>>  	if (ret < 0)
>>  		return ret;
>>  
>>
>> -- 
>> 2.51.0
>>
>>

-- 
// Casey (she/her)



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