[PATCH v2 9/9] configs: add qcom_ipq5210_mmc_defconfig
Simon Glass
sjg at chromium.org
Sat Apr 11 15:15:46 CEST 2026
Hi Varadarajan,
On 2026-04-10T09:11:45, Varadarajan Narayanan
<varadarajan.narayanan at oss.qualcomm.com> wrote:
> configs: add qcom_ipq5210_mmc_defconfig
>
> Introduce a defconfig for the Qualcomm IPQ5210 SoC based RDPs.
> Presently supports eMMC.
>
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan at oss.qualcomm.com>
>
> configs/qcom_ipq5210_mmc_defconfig | 106 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 106 insertions(+)
> diff --git a/configs/qcom_ipq5210_mmc_defconfig b/configs/qcom_ipq5210_mmc_defconfig
> @@ -0,0 +1,106 @@
> +CONFIG_DEBUG_UART_MSM_GENI=y
> +CONFIG_DEBUG_UART_ANNOUNCE=y
The other IPQ defconfigs (ipq5424, ipq9574) have CONFIG_DEBUG_UART=y
along with CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK. Without
these, preloader_console_init() in your SPL likely won't produce early
debug output. Please can you add these.
> diff --git a/configs/qcom_ipq5210_mmc_defconfig b/configs/qcom_ipq5210_mmc_defconfig
> @@ -0,0 +1,106 @@
> +CONFIG_SPL_TEXT_BASE=0x08c24000
> +CONFIG_SPL_MAX_SIZE=0x3D000
> +...
> +CONFIG_SPL_STACK=0x08c60000
Just to check, the SPL code region ends at 0x08c61000 (SPL_TEXT_BASE +
SPL_MAX_SIZE) but the stack is at 0x08c60000 which is inside that
region. If the SPL binary approaches the maximum size the stack will
collide with code. Is this intentional?
Regards,
Simon
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