[PATCH v2 07/10] mach-snapdragon: boot0.h: add sdm845_spl_boot0.h

[Simon Glass]

Hi Michael,

On 2026-04-11T00:00:12, Michael Srba <michael.srba at seznam.cz> wrote:
> mach-snapdragon: boot0.h: add sdm845_spl_boot0.h
>
> On sdm845, running u-boot SPL in EL3 requires escalting by using
> an unintentional feature in old builds of xbl_sec.elf. We do this
> in boot0.h so the rest of U-Boot can stay blissfully unaware
> of XBL_SEC. If we are already in EL3 for whatever reason, the
> code is skipped.
>
> Signed-off-by: Michael Srba <Michael.Srba at seznam.cz>
>
> arch/arm/mach-snapdragon/include/mach/boot0.h      |   4 +
>  .../include/mach/sdm845_spl_boot0.h                | 120 +++++++++++++++++++++
>  2 files changed, 124 insertions(+)

> diff --git a/arch/arm/mach-snapdragon/include/mach/sdm845_spl_boot0.h b/arch/arm/mach-snapdragon/include/mach/sdm845_spl_boot0.h
> @@ -0,0 +1,120 @@
> +.macro movl Wn, imm
> +    movz    \Xn,  \imm & 0xFFFF
> +    movk    \Xn, (\imm >> 16) & 0xFFFF, lsl 16
> +.endm

The macro parameter is named Wn but the body references \Xn - does
this actually build?

> @@ -0,0 +1,120 @@
> +.macro movq Xn, imm
> +    movz    \Xn,  \imm & 0xFFFF

Similar issue to above - also please use tabs to indent.

> @@ -0,0 +1,120 @@
> +el3_payload:
> +     /* disable the mmu for EL3 too */
> +     mrs     x0, sctlr_el3
> +     and     x0, x0, #~(1 << 0) // CTRL_M
> +     msr     sctlr_el3, x0
> +
> +     /* jump back to our code, but now in EL3 */
> +     movl    x0, CONFIG_SPL_TEXT_BASE
> +     add     x0, x0, (el3_ret_point - _start)
> +     br      x0
> +el3_payload_end:

After disabling the MMU in EL3 shouldn't you have an ISB before the branch?

Regards,
Simon