[PATCH v1 1/2] arch: arm: dts: socfpga: Update L4_SYS Security Control Register size

Chee, Tien Fong tien.fong.chee at altera.com
Mon Apr 13 11:31:28 CEST 2026


Hi Boon Khai,

> From: Ng, Boon Khai <boon.khai.ng at altera.com>
> Sent: Wednesday, February 25, 2026 11:21 AM
> To: U-boot Openlist <u-boot at lists.denx.de>
> Cc: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>; Ng, Boon Khai
> <boon.khai.ng at altera.com>; Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tingting Meng <tingting.meng at altera.com>; Tom
> Rini <trini at konsulko.com>; Maniyam, Dinesh <dinesh.maniyam at altera.com>; Lok,
> Chen Huei <chen.huei.lok at altera.com>; Hea, Kok Kiang
> <kok.kiang.hea at altera.com>
> Subject: [PATCH v1 1/2] arch: arm: dts: socfpga: Update L4_SYS Security
> Control Register size
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> noc_fw_tcu_tcu_scr register has a base address of 0xFFD21400 and an end
> address of 0xFFD214FF for Agilex7/7M and Stratix10, which makes the size of
> the register a total of 256 bytes.
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> Signed-off-by: Boon Khai Ng <boon.khai.ng at altera.com>
> ---
>  arch/arm/dts/socfpga_soc64_u-boot.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> diff --git a/arch/arm/dts/socfpga_soc64_u-boot.dtsi
> b/arch/arm/dts/socfpga_soc64_u-boot.dtsi
> index ce5b37ef547..a6e0b615717 100644
> --- a/arch/arm/dts/socfpga_soc64_u-boot.dtsi
> +++ b/arch/arm/dts/socfpga_soc64_u-boot.dtsi
> @@ -132,7 +132,7 @@
>                          /* TCU */
>                          noc_fw_tcu_tcu_scr at ffd21400 {
> -                               reg = <0xffd21400 0x00000004>;
> +                               reg = <0xffd21400 0x00000100>;

Instance decodes 0x100; reserved offsets are RAZ/WI” (or equivalent wording). If TRM does not guarantee benign behavior for reserved offsets, I’d NAK 0x100 and request to keep 0x4 until there’s a concrete need to program additional offsets.  Please check if only 0xFFD21400 is valid and accessing other offsets may bus fault / return unpredictable / hit other logic?

>                                  intel,offset-settings =
>                                          <0x00000000 0x01010001 0x01010001>;
>                                  bootph-all;
> --
> 2.43.7

Best regards,
Tien Fong


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