[PATCH v1] clk: altera: agilex: Update sync to async mode config in clk pll

[Chee, Tien Fong]

> From: Ng, Boon Khai <boon.khai.ng at altera.com>
> Sent: Wednesday, February 25, 2026 5:44 PM
> To: U-boot Openlist <u-boot at lists.denx.de>
> Cc: Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>; Maniyam, Dinesh
> <dinesh.maniyam at altera.com>; Lukasz Majewski <lukma at denx.de>; Naresh Kumar
> Ravulapalli <nareshkumar.ravulapalli at altera.com>; Patrice Chotard
> <patrice.chotard at foss.st.com>; Peng Fan <peng.fan at nxp.com>; Chee, Tien Fong
> <tien.fong.chee at altera.com>; Tom Rini <trini at konsulko.com>; Ng, Boon Khai
> <boon.khai.ng at altera.com>; Lok, Chen Huei <chen.huei.lok at altera.com>; Hea, Kok
> Kiang <kok.kiang.hea at altera.com>
> Subject: [PATCH v1] clk: altera: agilex: Update sync to async mode config in
> clk pll
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> Remove MEMBUS_CLKSLICE_REG source synchronous mode configuration to run
> as source asynchronous mode.
> Switching the HPS PLL to async mode improves resistance to clock
> marginality issues such as F2S clk to HPS PLL
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> Signed-off-by: Boon Khai Ng <boon.khai.ng at altera.com>
> ---
>  drivers/clk/altera/clk-agilex.c | 9 ---------
>  1 file changed, 9 deletions(-)
> diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
> index b793dbf6a42..426f400159c 100644
> --- a/drivers/clk/altera/clk-agilex.c
> +++ b/drivers/clk/altera/clk-agilex.c
> @@ -74,15 +74,6 @@ static const struct {
>          u32 val;
>          u32 mask;
>  } membus_pll[] = {
> -       {
> -               MEMBUS_CLKSLICE_REG,
> -               /*
> -                * BIT[7:7]
> -                * Enable source synchronous mode
> -                */
> -               BIT(7),
> -               BIT(7)
> -       },
>          {
>                  MEMBUS_SYNTHCALFOSC_INIT_CENTERFREQ_REG,
>                  /*
> --
> 2.43.7

Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong