[PATCH 1/3] arm: socfpga: Use custom header target buffer in SPL

Maniyam, Dinesh dinesh.maniyam at altera.com
Thu Apr 16 05:57:30 CEST 2026


Hi TF,

On 15/4/2026 11:55 am, Chee, Tien Fong wrote:
> Hi Dinesh,
>
> On 4/3/2026 11:30 am, dinesh.maniyam at altera.com wrote:
>> From: Dinesh Maniyam <dinesh.maniyam at altera.com>
>>
>> Allocate buffer from bottom half of DDR for the image headers in SPL on
>> Arria10. This allows SPL to load the fitImage header, parse it,
>> extract the FPGA core bitstream section from it, and program the FPGA.
>>
>> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>> Signed-off-by: Dinesh Maniyam <dinesh.maniyam at altera.com>
>> ---
>>   arch/arm/mach-socfpga/spl_a10.c | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/mach-socfpga/spl_a10.c 
>> b/arch/arm/mach-socfpga/spl_a10.c
>> index c20376f7f8e..c3fd90de8c5 100644
>> --- a/arch/arm/mach-socfpga/spl_a10.c
>> +++ b/arch/arm/mach-socfpga/spl_a10.c
>> @@ -27,6 +27,8 @@
>>   #include <watchdog.h>
>>   #include <asm/arch/pinmux.h>
>>   #include <asm/arch/fpga_manager.h>
>> +#include <exports.h>
>> +#include <log.h>
>>   #include <mmc.h>
>>   #include <memalign.h>
>>   #include <linux/delay.h>
>> @@ -284,3 +286,13 @@ void spl_board_prepare_for_boot(void)
>>       writel(FSBL_IMAGE_IS_VALID, socfpga_get_sysmgr_addr() +
>>              SYSMGR_A10_ROMCODE_INITSWSTATE);
>>   }
>> +
>> +#if CONFIG_IS_ENABLED(SPL_LOAD_FIT) && CONFIG_IS_ENABLED(SPL_SPI_LOAD)
>> +struct legacy_img_hdr  *spl_get_load_buffer(int offset, size_t size)
>> +{
>> +    if (gd->ram_size)
>> +        return (struct legacy_img_hdr *)(gd->ram_size / 2);
>
>
> The function currently returns gd->ram_size is a size, not a DRAM base 
> address,
>
> so ram_size/2 is not a valid pointer unless DRAM happens to start at 
> 0.  Even if A10 SDRAM is currently at 0x0,
>
> please use gd->ram_base (or CONFIG_SYS_SDRAM_BASE) instead of assuming 
> base=0.
>
> That makes the code robust if the memory map changes or if this logic 
> is reused elsewhere
>
> This can lead to SPL writing headers to an invalid/unmapped address or 
> corrupting memory.
>
> Please compute the buffer address using RAM base(if valid) + offset, 
> and also honor the offset argument and bound-check against the 
> reserved region.
>
> Since you want a scalable solution across DDR sizes, you can 
> dynamically reserve the upper half of DRAM for header parsing:
>
>     /* Be defensive */
>     if (offset < 0)
>         return NULL;
>
>     /* Need DRAM initialized and sized */
>     if (!gd->ram_size)
>         return NULL;
>
> hdr_base = gd->ram_base + gd->ram_size / 2
> hdr_size = gd->ram_size / 2
> require (size_t)offset + size <= hdr_size
> and return hdr_base + offset (aligned - ALIGN(addr, 64);).
>
> Also please drop unused includes (exports.h, log.h) if they’re not 
> needed after the respin.
>
> Best regards,
>
> Tien Fong
>
Agreed — thanks for catching this. I’ll fix the |gd->ram_size| misuse, 
derive the buffer from
|gd->ram_base|, honor |offset|, add bounds/DRAM checks, reserve the 
upper half of DRAM,
and drop unused includes.

Will send v2.

Regards,
Dinesh




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