[PATCH v1 1/3] common: memsize: add RAM size probe based on alias detection
Simon Glass
sjg at chromium.org
Thu Apr 16 23:07:03 CEST 2026
Hi Emanuele,
On 2026-04-16T08:45:22, Emanuele Ghidoli <ghidoliemanuele at gmail.com> wrote:
> common: memsize: add RAM size probe based on alias detection
>
> Add probe_ram_size_by_alias() to detect RAM size by checking whether a
> write to one address aliases to another address.
>
> Compared to get_ram_size(), this function allows the caller to:
> - limit probing to a small set of required accesses
> - avoid touching reserved or already used memory regions
> - handle non-linear alias patterns
>
> On the iMX95 SoC, when used with LPDDR5, accesses beyond the end of an 8GB DDR
> configuration do not alias to the expected linear wrap-around addresses.
> Instead, the aliased addresses appears to follow a pattern related to the
> DDRC bank and bank-group addresses mapping. Experimentally, the observed
> pattern is:
>
> Write Read
> y00000000 -> x0001c000
> y00004000 -> x00018000
> y00008000 -> x00014000
> [...]
>
> common/memsize.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> include/init.h | 7 +++++++
> 2 files changed, 63 insertions(+)
> diff --git a/common/memsize.c b/common/memsize.c
> @@ -127,6 +127,62 @@ long get_ram_size(long *base, long maxsize)
> +long probe_ram_size_by_alias(const struct ram_alias_check *checks)
> +{
> + long save[2];
> + int dcache_en = dcache_status();
Do we need to check for CONFIG_IS_ENABLED(SYS_DCACHE_OFF) here?
Reviewed-by: Simon Glass <sjg at chromium.org>
Regards,
Simon
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