[PATCH v4 0/5] Enable USB3 Super-Speed support for QCM6490/SC7280

[Balaji Selvanathan]

Hi Casey,

Can you pls take this latest series (v4) on QCS6490 Super Speed support 
instead of v3. This still has the "unused variable 'cfg' 
[-Werror=unused-variable]" error that Tony specified though in th pull 
request.

Thanks,

Balaji

On 4/18/2026 12:05 PM, Balaji Selvanathan wrote:
> This series enables USB3 Super-Speed functionality on QCM6490 and SC7280
> platforms by adding support for the QMP USB3-DP Combo PHY. The combo PHY
> is a dual-mode PHY that can operate in either USB3 or DisplayPort mode,
> and this implementation focuses on USB3 mode to enable Super-Speed USB
> support.
>
> Patch 1 adds the necessary clock support.
> Patch 2 implements the QMP Combo PHY driver, ported from upstream Linux
> Patch 3 adds logic to skip USB High-Speed fixup if Super Speed PHY
> driver support is available.
> Patch 4 adds the necessary defconfig.
> Patch 5 updates the Maintainers file.
>
> Signed-off-by: Balaji Selvanathan <balaji.selvanathan at oss.qualcomm.com>
> ---
> Changes in v4:
> - In patch 3, instead of automatically detect if SSPHY driver is
>    available at runtime (which adds computational overhead), instead
>    just skip HS fixup based on usb node compatible string.
> - Link to v3: https://lore.kernel.org/u-boot/20251203110735.1959862-1-balaji.selvanathan@oss.qualcomm.com/#t
>
> Changes in v3:
> - Corrected regulator names in drivers/phy/qcom/phy-qcom-qmp-combo.c
> - Made regulators mandatory in phy probe;
>    if regulator not present, now probe fails
> - Removed support to manually disable the USB HS fixup via Kconfig.
> - Instead added code to automatically detect if
>    SSPHY driver is available and do HS fixup only if SSPHY driver is
>    not available.
> - Link to v2: https://lore.kernel.org/u-boot/20251124155503.2839766-1-balaji.selvanathan@oss.qualcomm.com/
>
> Changes in v2:
> - Gave correct commit id for reference linux implementation for
>    adding mdelay in drivers/usb/dwc3/core.c
> - In drivers/phy/qcom/phy-qcom-qmp-combo.c:
> 	- Added pipe clock disable in qmp_combo_power_off sequence
> 	- Added all required clocks except pipe clock
>            in qmp_combo_phy_clk_l
> 	- All clocks except pipe clock are enabled and disabled
> 	  seperate from pipe clock
> 	- Added support for regulator power supplies
> 	- Added a minimal xlate to only return the USB3 phy
> - Added "drivers/phy/qcom" to ARM SNAPDRAGON section in MAINTAINERS file
> - Link to v1: https://lore.kernel.org/u-boot/20251119152530.4175628-1-balaji.selvanathan@oss.qualcomm.com/
> ---
>
> ---
> Balaji Selvanathan (5):
>        drivers: clk: qcom: sc7280: Add USB3 PHY pipe clock
>        drivers: phy: qcom: Add QMP USB3-DP Combo PHY driver
>        arm: mach-snapdragon: Skip USB fixup for qcom,sc7280-dwc3
>        configs: qcm6490: Enable super-speed USB support
>        MAINTAINERS: Add entry for Qualcomm PHY drivers
>
>   MAINTAINERS                                |   1 +
>   arch/arm/mach-snapdragon/of_fixup.c        |  54 ++-
>   configs/qcm6490_defconfig                  |   2 +
>   drivers/clk/qcom/clock-sc7280.c            |   1 +
>   drivers/phy/qcom/Kconfig                   |   8 +
>   drivers/phy/qcom/Makefile                  |   1 +
>   drivers/phy/qcom/phy-qcom-qmp-combo.c      | 644 +++++++++++++++++++++++++++++
>   drivers/phy/qcom/phy-qcom-qmp-common.h     |  62 +++
>   drivers/phy/qcom/phy-qcom-qmp-dp-com-v3.h  |  18 +
>   drivers/phy/qcom/phy-qcom-qmp-pcs-usb-v4.h |  34 ++
>   drivers/phy/qcom/phy-qcom-qmp.h            |  17 +
>   11 files changed, 825 insertions(+), 17 deletions(-)
> ---
> base-commit: 30429c8bd2f18d33862cc41fe520f7459fa4bfbd
> change-id: 20260418-kodiak_ss-49942d3249f0
>
> Best regards,