[PATCH 14/16] spacemit: k1: Add multiple device tree support
Raymond Mao
raymondmaoca at gmail.com
Wed Apr 22 16:31:10 CEST 2026
From: Raymond Mao <raymond.mao at riscstar.com>
Enable multiple DTB support in the FIT image for the Spacemit K1 SoC,
allowing a single U-Boot binary to support different board variants.
The SPL reads the board type from EEPROM and selects the corresponding
device tree at runtime via board_fit_config_name_match(), ensuring the
correct hardware description is passed to U-Boot proper.
Enlarge CONFIG_SYS_MALLOC_F_LEN to enable multiple device tree support.
Switch to MMODE since opensbi firmware is included at the same tim.
Signed-off-by: Raymond Mao <raymond.mao at riscstar.com>
---
arch/riscv/dts/Makefile | 2 +-
arch/riscv/dts/k1-bananapi-f3.dts | 161 ++++++++++++++++++++++++
arch/riscv/dts/k1-muse-pi-pro.dts | 199 ++++++++++++++++++++++++++++++
arch/riscv/dts/k1-spl.dts | 47 +++----
board/spacemit/k1/spl.c | 29 ++++-
configs/spacemit_k1_defconfig | 7 +-
6 files changed, 415 insertions(+), 30 deletions(-)
create mode 100644 arch/riscv/dts/k1-muse-pi-pro.dts
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 61a7acabd27..22b62e25d4d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -9,7 +9,7 @@ dtb-$(CONFIG_TARGET_LICHEERV_NANO) += sg2002-licheerv-nano-b.dtb
dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb
dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
-dtb-$(CONFIG_TARGET_SPACEMIT_K1) += k1-bananapi-f3.dtb k1-spl.dtb
+dtb-$(CONFIG_TARGET_SPACEMIT_K1) += k1-bananapi-f3.dtb k1-muse-pi-pro.dtb k1-spl.dtb
dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv64.dtb
dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-binman.dtb
diff --git a/arch/riscv/dts/k1-bananapi-f3.dts b/arch/riscv/dts/k1-bananapi-f3.dts
index 6b5b83bcdb9..ea11029c182 100644
--- a/arch/riscv/dts/k1-bananapi-f3.dts
+++ b/arch/riscv/dts/k1-bananapi-f3.dts
@@ -21,8 +21,169 @@
};
};
+&vctcxo_1m {
+ status = "okay";
+};
+
+&vctcxo_24m {
+ status = "okay";
+};
+
+&vctcxo_3m {
+ status = "okay";
+};
+
+&osc_32k {
+ status = "okay";
+};
+
+&soc {
+ system-controller at d4050000 {
+ status = "okay";
+ };
+ clock-controller at d4090000 {
+ status = "okay";
+ };
+ system-controller at d4282800 {
+ status = "okay";
+ };
+ system-controller at d4015000 {
+ clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
+ <&vctcxo_24m>, <&syscon_mpmu CLK_PLL1_31P5>,
+ <&pll CLK_PLL1_D4>;
+ clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
+ "vctcxo_24m", "pll1_d78_31p5", "pll1_d4";
+ status = "okay";
+ };
+
+ i2c at d4012000 { /* i2c2 */
+ status = "okay";
+ eeprom: eeprom {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ status = "okay";
+ };
+ };
+
+ reset-controller at d4050000 {
+ status = "okay";
+ };
+};
+
&uart0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
+};
+
+&i2c8 {
status = "okay";
+ pmic at 41 {
+ compatible = "spacemit,p1";
+ reg = <0x41>;
+ status = "okay";
+
+ regulators {
+ buck1 {
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck3_1v8: buck3 {
+ regulator-name = "vdd_1v8";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ aldo1 {
+ regulator-name = "vdd_1v8_mmc";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ };
+
+ aldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo7 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+ };
+ };
};
diff --git a/arch/riscv/dts/k1-muse-pi-pro.dts b/arch/riscv/dts/k1-muse-pi-pro.dts
new file mode 100644
index 00000000000..43f08317e31
--- /dev/null
+++ b/arch/riscv/dts/k1-muse-pi-pro.dts
@@ -0,0 +1,199 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2026 RISCstar Ltd.
+ */
+
+#include "k1.dtsi"
+#include "binman.dtsi"
+
+/ {
+ model = "spacemit k1-x MUSE-Pi-Pro board";
+ compatible = "spacemit,muse-pi-pro", "spacemit,k1";
+
+ aliases {
+ console = &uart0;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&vctcxo_1m {
+ status = "okay";
+};
+
+&vctcxo_24m {
+ status = "okay";
+};
+
+&vctcxo_3m {
+ status = "okay";
+};
+
+&osc_32k {
+ status = "okay";
+};
+
+&soc {
+ system-controller at d4050000 {
+ status = "okay";
+ };
+ clock-controller at d4090000 {
+ status = "okay";
+ };
+ system-controller at d4282800 {
+ status = "okay";
+ };
+ system-controller at d4015000 {
+ clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>,
+ <&vctcxo_24m>, <&syscon_mpmu CLK_PLL1_31P5>,
+ <&pll CLK_PLL1_D4>;
+ clock-names = "osc", "vctcxo_1m", "vctcxo_3m",
+ "vctcxo_24m", "pll1_d78_31p5", "pll1_d4";
+ status = "okay";
+ };
+
+ i2c at d4012000 { /* i2c2 */
+ status = "okay";
+ eeprom: eeprom {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ status = "okay";
+ };
+ };
+
+ reset-controller at d4050000 {
+ status = "okay";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+ pmic at 41 {
+ compatible = "spacemit,p1";
+ reg = <0x41>;
+ status = "okay";
+
+ regulators {
+ buck1 {
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck3_1v8: buck3 {
+ regulator-name = "vdd_1v8";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ buck6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3450000>;
+ regulator-ramp-delay = <5000>;
+ regulator-always-on;
+ };
+
+ aldo1 {
+ regulator-name = "vdd_1v8_mmc";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ };
+
+ aldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ aldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo1 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo2 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo3 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo4 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo5 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo6 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ dldo7 {
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3400000>;
+ };
+ };
+ };
+};
+
+&qspi {
+ status = "okay";
+
+ flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <26500000>;
+ m25p,fast-read;
+ broken-flash-reset;
+ status = "okay";
+ };
+};
diff --git a/arch/riscv/dts/k1-spl.dts b/arch/riscv/dts/k1-spl.dts
index e3311af76e6..b8b600b792e 100644
--- a/arch/riscv/dts/k1-spl.dts
+++ b/arch/riscv/dts/k1-spl.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "k1.dtsi"
+#include "binman.dtsi"
/ {
model = "spacemit k1 spl";
@@ -19,29 +20,6 @@
chosen {
stdout-path = "serial0:115200n8";
};
-
- binman {
- u-boot-spl-ddr {
- type = "section";
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
-
- u-boot-spl {
- };
-
- ddr-fw {
- type = "blob";
- filename = "ddr_fw.bin";
- align = <64>;
- };
-
- u-boot-any {
- type = "section";
- size = <0>;
- offset = <0>;
- };
- };
- };
};
&vctcxo_1m {
@@ -54,6 +32,29 @@
bootph-pre-ram;
};
+&binman {
+ u-boot-spl-ddr {
+ type = "section";
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+
+ u-boot-spl {
+ };
+
+ ddr-fw {
+ type = "blob";
+ filename = "ddr_fw.bin";
+ align = <64>;
+ };
+
+ u-boot-any {
+ type = "section";
+ size = <0>;
+ offset = <0>;
+ };
+ };
+};
+
&vctcxo_3m {
status = "okay";
bootph-pre-ram;
diff --git a/board/spacemit/k1/spl.c b/board/spacemit/k1/spl.c
index 77b6df1371b..9b30bc9ea7e 100644
--- a/board/spacemit/k1/spl.c
+++ b/board/spacemit/k1/spl.c
@@ -8,12 +8,12 @@
#include <binman_sym.h>
#include <clk.h>
#include <clk-uclass.h>
-#include <cpu_func.h>
#include <configs/k1.h>
#include <cpu_func.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <i2c.h>
+#include <linux/ctype.h>
#include <linux/delay.h>
#include <log.h>
#include <power/regulator.h>
@@ -56,6 +56,8 @@ struct ddr_cfg {
binman_sym_declare(ulong, ddr_fw, image_pos);
binman_sym_declare(ulong, ddr_fw, size);
+char product_name[I2C_BUF_SIZE] = "k1";
+
static void reset_early_init(void)
{
struct udevice *dev;
@@ -327,7 +329,6 @@ void nor_early_init(void)
void board_init_f(ulong dummy)
{
- u8 i2c_buf[I2C_BUF_SIZE];
int ret;
ret = spl_early_init();
@@ -343,11 +344,11 @@ void board_init_f(ulong dummy)
preloader_console_init();
i2c_early_init();
- ret = read_product_name(i2c_buf, I2C_BUF_SIZE);
+ ret = read_product_name(product_name, I2C_BUF_SIZE);
if (ret)
log_info("Fail to detect board:%d\n", ret);
else
- log_info("Get board name:%s\n", (char *)i2c_buf);
+ log_info("Get board name:%s\n", product_name);
pmic_init();
ddr_early_init();
@@ -363,6 +364,26 @@ void spl_board_init(void)
{
}
+int board_fit_config_name_match(const char *name)
+{
+ char fdt_name[I2C_BUF_SIZE];
+ int i;
+
+ memset(fdt_name, 0, I2C_BUF_SIZE);
+ if (!strncmp(product_name, "k1-x_", 5)) {
+ snprintf(fdt_name, I2C_BUF_SIZE, "%s-%s", "k1",
+ &product_name[5]);
+ }
+ for (i = 0; i < I2C_BUF_SIZE; i++) {
+ if (fdt_name[i] == '\0')
+ break;
+ fdt_name[i] = tolower(fdt_name[i]);
+ }
+ if (!strcmp(name, fdt_name))
+ return 0;
+ return -ENOENT;
+}
+
void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
{
return (void *)CONFIG_SPL_LOAD_FIT_ADDRESS;
diff --git a/configs/spacemit_k1_defconfig b/configs/spacemit_k1_defconfig
index 97b6c8cbbb0..13f055cdf53 100644
--- a/configs/spacemit_k1_defconfig
+++ b/configs/spacemit_k1_defconfig
@@ -4,6 +4,7 @@ CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
CONFIG_DEFAULT_DEVICE_TREE="k1-spl"
+CONFIG_OF_LIST="k1-bananapi-f3 k1-muse-pi-pro"
CONFIG_SPL=y
CONFIG_SPL_TEXT_BASE=0xc0801000
CONFIG_SPL_MAX_SIZE=0x33000
@@ -22,7 +23,8 @@ CONFIG_SYS_LOAD_ADDR=0x200000
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_TARGET_SPACEMIT_K1=y
-CONFIG_SPL_RISCV_SMODE=y
+CONFIG_SPL_RISCV_MMODE=y
+# CONFIG_SPL_SMP is not set
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
@@ -58,7 +60,7 @@ CONFIG_CLK=y
CONFIG_CLK_CCF=y
CONFIG_CLK_SPACEMIT=y
CONFIG_CLK_SPACEMIT_K1=y
-CONFIG_SYS_MALLOC_F_LEN=0x5000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_SPACEMIT_K1=y
CONFIG_MISC=y
@@ -100,3 +102,4 @@ CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_SPI_FLASH_TINY=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x5300
--
2.25.1
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