[PATCH v3] usb: dwc2_udc_otg_phy: fix compilation on non-Exynos patforms

[Marek Vasut]

On 4/22/26 10:32 AM, Marius Dinu wrote:
> s5p_cpu_id used in drivers/usb/gadget/dwc2_udc_otg_phy.c is undefined on
> platforms other than Exynos.
> 
> Signed-off-by: Marius Dinu <m95d+git at psihoexpert.ro>
> Acked-by: Quentin Schulz <quentin.schulz at cherry.de>
> ---
>   drivers/usb/gadget/dwc2_udc_otg_phy.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c
> index e0ac5d142b0..c56ff1125bd 100644
> --- a/drivers/usb/gadget/dwc2_udc_otg_phy.c
> +++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c
> @@ -56,10 +56,12 @@ void otg_phy_init(struct dwc2_udc *dev)
>   	else /* C110 GONI */
>   		clrbits_le32(&phy->phypwr, OTG_DISABLE_0 | ANALOG_PWRDOWN | FORCE_SUSPEND_0);

This ^ C210 Universal and C110 Goni stuff is also Exynos specific. Do we 
need some SoC-specific dwc2_udc_otg_phy_exynos.c file which would 
contain that SoC specific code ?

> +#if defined(CONFIG_ARCH_EXYNOS) || defined(CONFIG_ARCH_S5PC1XX)
>   	if (s5p_cpu_id == 0x4412)
>   		clrsetbits_le32(&phy->phyclk, EXYNOS4X12_ID_PULLUP0 | EXYNOS4X12_COMMON_ON_N0,
>   				EXYNOS4X12_CLK_SEL_24MHZ); /* PLL 24Mhz */
>   	else
> +#endif
>   		clrsetbits_le32(&phy->phyclk, ID_PULLUP0 | COMMON_ON_N0,
>   				CLK_SEL_24MHZ); /* PLL 24Mhz */
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