[PATCH 7/9] net: dwc_eth_qos: Add mediatek support

[David Lechner]

On 4/23/26 8:25 AM, Julien Stephan wrote:
> Synopsys DWC Ethernet QOS device support for MediaTek SoCs.
> in particular this initial commit adds support for Genio 520/720 and
> Genio 510/700 EVKs
> 

...

> +#define RX_DELAY_MAX_PS			9800
> +#define TX_DELAY_MAX_PS			9800

Do we need two macros for the same value? Or can be DELAY_MAX_PS?

> +
> +#define OUT_OP				true
> +

...

> +static int mtk_set_interface(struct udevice *dev)
> +{
> +	struct eth_pdata *pdata = dev_get_plat(dev);
> +	struct eqos_mtk_priv *mtk_pdata = pdata->priv_pdata;
> +	int rmii_clk_from_mac = mtk_pdata->rmii_clk_from_mac ? EQOS_MTK_RMII_CLK_SRC_INTERNAL : 0;
> +	int rmii_rxc = mtk_pdata->rmii_rxc ? EQOS_MTK_RMII_CLK_SRC_RXC : 0;
> +	u32 intf_val = 0;
> +
> +	/* select phy interface in top control domain */
> +	switch (pdata->phy_interface) {
> +	case PHY_INTERFACE_MODE_MII:
> +		intf_val |= FIELD_PREP(EQOS_MTK_ETH_INTF_SEL, EQOS_MTK_PHY_INTF_MII);
> +		break;
> +	case PHY_INTERFACE_MODE_RMII:
> +		intf_val |= (rmii_rxc | rmii_clk_from_mac);
> +		intf_val |= FIELD_PREP(EQOS_MTK_ETH_INTF_SEL, EQOS_MTK_PHY_INTF_RMII);
> +		break;
> +	case PHY_INTERFACE_MODE_RGMII:
> +	case PHY_INTERFACE_MODE_RGMII_TXID:
> +	case PHY_INTERFACE_MODE_RGMII_RXID:
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		intf_val |= FIELD_PREP(EQOS_MTK_ETH_INTF_SEL, EQOS_MTK_PHY_INTF_RGMII);
> +		break;
> +	default:
> +		pr_err("%s: dev=%p phy interface not supported\n", __func__, dev);
> +		return -EINVAL;
> +	}
> +
> +	/* only support external PHY */
> +	intf_val |= EQOS_MTK_EXT_PHY_MODE;
> +	if (OUT_OP)

OUT_OP is defined as true. Can we drop the macro and the condition?

> +		intf_val |= EQOS_MTK_TXC_OUT_OP;
> +
> +	regmap_write(mtk_pdata->peri_regmap, MT8189_PERI_ETH_CTRL0, intf_val);
> +
> +	return 0;
> +}
> +
> +static int mtk_config_dt(struct udevice *dev)
> +{	struct eth_pdata *pdata = dev_get_plat(dev);
> +	struct eqos_mtk_priv *mtk_pdata = pdata->priv_pdata;
> +	struct ofnode_phandle_args args;
> +	u32 tx_delay_ps, rx_delay_ps;
> +	int ret;
> +
> +	if (!dev_read_u32(dev, "mediatek,tx-delay-ps", &tx_delay_ps)) {
> +		if (tx_delay_ps > TX_DELAY_MAX_PS) {
> +			pr_err("%s: dev=%p Invalid TX clock delay: %dps\n",
> +			       __func__, dev, tx_delay_ps);
> +			return -EINVAL;
> +		}
> +	}
> +
> +	if (!dev_read_u32(dev, "mediatek,rx-delay-ps", &rx_delay_ps)) {
> +		if (rx_delay_ps > RX_DELAY_MAX_PS) {
> +			pr_err("%s: dev=%p Invalid RX clock delay: %dps\n",
> +			       __func__, dev, rx_delay_ps);
> +			return -EINVAL;
> +		}
> +	}
> +
> +	/* 290ps per stage */

Should we make a macro for that?

> +	mtk_pdata->tx_delay_ps_per_stage = tx_delay_ps / 290;
> +	mtk_pdata->rx_delay_ps_per_stage = rx_delay_ps / 290;

Doing demtional analysis, ps / (ps/stage) = stage.

So {tx,rx}_delay_ps_per_stage should just be stage units, not
ps_per_stage.

> +
> +	mtk_pdata->tx_inv = dev_read_bool(dev, "mediatek,txc-inverse");
> +	mtk_pdata->rx_inv = dev_read_bool(dev, "mediatek,rxc-inverse");
> +	mtk_pdata->rmii_clk_from_mac = dev_read_bool(dev, "mediatek,rmii-clk-from-mac");
> +	mtk_pdata->rmii_rxc = dev_read_bool(dev, "mediatek,rmii-rxc");
> +
> +	ret = dev_read_phandle_with_args(dev, "mediatek,pericfg", NULL, 0, 0, &args);
> +	if (ret) {
> +		pr_err("Failed to get mediatek,pericfg property: %d\n", ret);
> +		return ret;
> +	}
> +
> +	mtk_pdata->peri_regmap = syscon_node_to_regmap(args.node);
> +	if (IS_ERR(mtk_pdata->peri_regmap)) {
> +		pr_err("%s: dev=%p Invalid perif_cfg reg\n", __func__, dev);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +