Couple of clang warnings for Rockchip boards

[Tom Rini]

On Thu, Apr 23, 2026 at 11:04:56AM +0200, Quentin Schulz wrote:
> Hi Tom,
> 
> On 4/22/26 7:51 PM, Tom Rini wrote:
> > On Wed, Apr 22, 2026 at 03:25:55PM +0200, Quentin Schulz wrote:[...]>>
> > Some platforms couldn't be built due to hitting the max TPL
> limit (e.g.
> > > PX30).
> > 
> > I've also run in to this over the years trying to test clang and having
> > LTO not work, or be very much larger than expected. Just FYI.
> > 
> 
> We do document that the image is bigger in
> https://docs.u-boot.org/en/latest/build/clang.html:
> 
> """
> The biggest problem when trying to compile U-Boot with Clang is that almost
> all archs rely on storing gd in a global register and the Clang 3.5 user
> manual states: “Clang does not support global register variables; this is
> unlikely to be implemented soon because it requires additional LLVM backend
> support.”
> 
> The ARM backend can be instructed not to use the r9 and x18 registers using
> -ffixed-r9 or -ffixed-x18 respectively. As global registers themselves are
> not supported inline assembly is needed to get and set the r9 or x18 value.
> This leads to larger code then strictly necessary, but at least works.
> """
> 
> so I wasn't surprised (also, TPL on PX30 is *very* close to the limit
> already so much so that adding a printf is sometimes enough to hit that
> limit, making debugging... interesting :) ).

That particular page really needs some updating, it was written forever
ago and is very out of date. I do wonder if there's a more general
clang+SPL problem in that I recall things like SPL for am335x_evm
growing to like 4x the size, which doesn't make that much sense.

-- 
Tom
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