[PATCH v2 2/2] arm: dts: socfpga: Enable 8-bit embedded device support in Agilex5 eMMC device tree

[tze.yee.ng at altera.com]

From: tzeyeeng <tzeyee.ng at altera.com>

The eMMC device tree inherits the configuration from
socfpga_agilex5_socdk.dts.

Changes:
- Set SDHCI Capabilities bit18 to enable 8-bit embedded device support.

Signed-off-by: tzeyeeng <tzeyee.ng at altera.com>

---
Changes in v2:
- Remove /delete-property/ sd-uhs-sdr50 and /delete-property/
  sd-uhs-sdr104 from mmc node
- Fix wording in commit message
- Update commit title
---
 arch/arm/dts/socfpga_agilex5_socdk_emmc.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/socfpga_agilex5_socdk_emmc.dts b/arch/arm/dts/socfpga_agilex5_socdk_emmc.dts
index 92ff8b4acf2..52aa92e4292 100644
--- a/arch/arm/dts/socfpga_agilex5_socdk_emmc.dts
+++ b/arch/arm/dts/socfpga_agilex5_socdk_emmc.dts
@@ -18,7 +18,6 @@
 };
 
 &mmc {
-	/delete-property/ sd-uhs-sdr104;
 	status = "okay";
 
 	no-sd;
@@ -32,8 +31,8 @@
 	vmmc-supply = <&sd_emmc_power>;
 	vqmmc-supply = <&emmc_io_1v8_reg>;
 	max-frequency = <200000000>;
-	sdhci-caps-mask = <0x00000000 0x00040000>;
-	sdhci-caps = <0x0 0x040000>;	/* SDHCI_CAN_DO_8BIT */
+	sdhci-caps = <0x00000000 0x0004c800>;	/* SDHCI_CAN_DO_8BIT */
+	sdhci-caps-mask = <0x00000000 0x0004ff00>;
 
 	/* eMMC legacy mode timing configuration */
 	cdns,phy-dqs-timing-delay-sd-ds = <0x00780000>;
-- 
2.43.7