[PATCH] rockchip: fix asm-operand-widths clang warning

[Simon Glass]

On 2026-04-23T14:05:13, Quentin Schulz <foss+uboot at 0leil.net> wrote:
> rockchip: fix asm-operand-widths clang warning
>
> CONFIG_COUNTER_FREQUENCY is currently 24000000 for all SoCs, meaning it
> fits in a 32b type. For 64b SoCs, it's an issue since the registers are
> 64b.
>
> clang complains that we're trying to fit a 32b value into a 64b
> register:
>
> arch/arm/mach-rockchip/rk3528/rk3528.c:98:45: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
>    98 |         asm volatile("msr cntfrq_el0, %0" : : 'r' (CONFIG_COUNTER_FREQUENCY));
>       |                                                    ^
> include/generated/autoconf.h:372:34: note: expanded from macro 'CONFIG_COUNTER_FREQUENCY'
>   372 | #define CONFIG_COUNTER_FREQUENCY 24000000
>       |                                  ^
> /home/qschulz/work/upstream/u-boot/arch/arm/mach-rockchip/rk3528/rk3528.c:98:32: note: use constraint modifier 'w'
>    98 |         asm volatile("msr cntfrq_el0, %0" : : 'r' (CONFIG_COUNTER_FREQUENCY));
>       |                                       ^~
>       |                                       %w0
>
> Even though cntfrq_el0[1] is only using the 32b LSB of its 64b, use the
> 'x' operand modifier[2] to force the value to be 64b and fix the
> warning.
>
> [1] https://developer.arm.com/documentation/ddi0601/2026-03/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-Register?lang=en
> [2] https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AArch64-Operand-Modifiers
>
> Suggested-by: Mark Kettenis <mark.kettenis at xs4all.nl>
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>
>
> arch/arm/mach-rockchip/rk3528/rk3528.c | 2 +-
>  arch/arm/mach-rockchip/rk3576/rk3576.c | 2 +-
>  arch/arm/mach-rockchip/rk3588/rk3588.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass <sjg at chromium.org>