[PATCH] riscv: Disable -fpic for SPL builds

Michal Simek michal.simek at amd.com
Thu Apr 30 13:59:07 CEST 2026


When building U-Boot SPL for RISC-V with position-independent code
(-fpic), the linker fails with relocation errors like:

  relocation truncated to fit: R_RISCV_PCREL_HI20 against `symbol'

This occurs because SPL's linker script places .bss in a separate
memory region (.bss_mem) from .text/.data (.spl_mem). With -fpic,
accessing global variables uses PC-relative GOT addressing, which
fails when the distance between code and data exceeds the 20-bit
signed offset limit of R_RISCV_PCREL_HI20.

The main U-Boot binary requires -fpic for runtime relocation support,
but SPL runs from a fixed address and doesn't need position-independent
code. Disable -fpic for SPL builds while keeping it enabled for the
main U-Boot image.

   spl/u-boot-spl: all -1187 bss +4 data -2631 rodata +2440 text -1000

Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/riscv/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk
index eddd6a3b9a29..b1cfb25e7ea3 100644
--- a/arch/riscv/config.mk
+++ b/arch/riscv/config.mk
@@ -35,7 +35,7 @@ EFI_LDS			:= elf_riscv64_efi.lds
 PLATFORM_ELFFLAGS	+= -B riscv -O elf64-$(large-endian)riscv
 endif
 
-PLATFORM_CPPFLAGS	+= -ffixed-x3 -fpic
+PLATFORM_CPPFLAGS	+= -ffixed-x3 $(if $(CONFIG_XPL_BUILD),,-fpic)
 PLATFORM_RELFLAGS	+= -fno-common -ffunction-sections -fdata-sections
 LDFLAGS_u-boot		+= --gc-sections -static -pie
 
-- 
2.43.0

base-commit: 75160eb268d7a445e8483b357f7814bef30b12d4
branch: debian-sent3


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