[PATCH 06/15] ddr: altera: n5x: set DDR init progress bit for watchdog recovery

[Chen Huei Lok]

From: Tien Fong Chee <tien.fong.chee at altera.com>

Bit[30] of the boot scratch cold 8 register tracks DDR init progress. SDM
inspects it when the watchdog fires due to a DDR init hang, so that it can
run a clean reset of the DDR subsystem before the next attempt.

Set the bit when SDRAM init starts and clear it once the basic memory test
has passed.

Signed-off-by: Tien Fong Chee <tien.fong.chee at altera.com>
Signed-off-by: Chen Huei Lok <chen.huei.lok at altera.com>
---
 drivers/ddr/altera/sdram_n5x.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 609f0f9cbd7..9c3f07b409d 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -421,6 +421,18 @@ enum data_process {
 	LOADING
 };
 
+void ddr_init_inprogress(bool start)
+{
+	if (start)
+		setbits_le32(socfpga_get_sysmgr_addr() +
+			     SYSMGR_SOC64_BOOT_SCRATCH_COLD8,
+			     ALT_SYSMGR_SCRATCH_REG_8_DDR_PROGRESS_MASK);
+	else
+		clrbits_le32(socfpga_get_sysmgr_addr() +
+			     SYSMGR_SOC64_BOOT_SCRATCH_COLD8,
+			     ALT_SYSMGR_SCRATCH_REG_8_DDR_PROGRESS_MASK);
+}
+
 bool is_ddr_retention_enabled(u32 reg)
 {
 	if (reg & ALT_SYSMGR_SCRATCH_REG_0_DDR_RETENTION_MASK)
@@ -2815,6 +2827,7 @@ int sdram_mmr_init_full(struct udevice *dev)
 
 	if (!is_ddr_init_skipped(reg)) {
 		printf("SDRAM init in progress ...\n");
+		ddr_init_inprogress(true);
 
 		/*
 		 * Polling reset complete, must be high to ensure DDR
@@ -2965,6 +2978,9 @@ int sdram_mmr_init_full(struct udevice *dev)
 
 	sdram_size_check(&bd);
 
+	/* Marking end of ddr init with passing basic memory test */
+	ddr_init_inprogress(false);
+
 	sdram_set_firewall(&bd);
 
 	if (is_ddr_retention_enabled(reg)) {
-- 
2.43.7