[PATCH 7/9] clk: mediatek: mt7981: convert to mtk_gate_clk_data

[Julien Stephan]

MT7981 currently declares a separate U_BOOT_DRIVER, probe() function
and compatible table for each clock gate controller, despite all of
them sharing the same implementation.

Convert MT7981 to use the generic mtk_gate_clk_data infrastructure.
sgmiisys_0 and sgmiisys_1 are merged into a single generic driver,
while ethsys keeps its own U_BOOT_DRIVER since it additionally binds
a reset controller, but shares the generic probe() function.

No functional change intended.

Signed-off-by: Julien Stephan <jstephan at baylibre.com>
---
 drivers/clk/mediatek/clk-mt7981.c | 66 ++++++++++++++++++---------------------
 1 file changed, 30 insertions(+), 36 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt7981.c b/drivers/clk/mediatek/clk-mt7981.c
index 4e3a1c9d835..b8064073bb6 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -751,26 +751,6 @@ static const struct mtk_gate sgmii0_cgs[] = {
 	GATE_SGMII(CLK_SGM0_CDR_CK0_EN, "sgm0_cdr_ck0_en", CLK_TOP_USB_CDR_CK, 5),
 };
 
-static int mt7981_sgmii0sys_probe(struct udevice *dev)
-{
-	return mtk_common_clk_gate_init(dev, &mt7981_clk_tree,
-					sgmii0_cgs, ARRAY_SIZE(sgmii0_cgs), 0);
-}
-
-static const struct udevice_id mt7981_sgmii0sys_compat[] = {
-	{ .compatible = "mediatek,mt7981-sgmiisys_0", },
-	{}
-};
-
-U_BOOT_DRIVER(mt7981_clk_sgmii0sys) = {
-	.name = "mt7981-clock-sgmii0sys",
-	.id = UCLASS_CLK,
-	.of_match = mt7981_sgmii0sys_compat,
-	.probe = mt7981_sgmii0sys_probe,
-	.priv_auto = sizeof(struct mtk_cg_priv),
-	.ops = &mtk_clk_gate_ops,
-};
-
 static const struct mtk_gate sgmii1_cgs[] = {
 	GATE_SGMII(CLK_SGM1_TX_EN, "sgm1_tx_en", CLK_TOP_USB_TX250M, 2),
 	GATE_SGMII(CLK_SGM1_RX_EN, "sgm1_rx_en", CLK_TOP_USB_EQ_RX250M, 3),
@@ -778,22 +758,37 @@ static const struct mtk_gate sgmii1_cgs[] = {
 	GATE_SGMII(CLK_SGM1_CDR_CK1_EN, "sgm1_cdr_ck1_en", CLK_TOP_USB_CDR_CK, 5),
 };
 
-static int mt7981_sgmii1sys_probe(struct udevice *dev)
+static int mt7981_clk_gate_probe(struct udevice *dev)
 {
+	struct mtk_gate_clk_data *data;
+
+	data = (void *)dev_get_driver_data(dev);
+
 	return mtk_common_clk_gate_init(dev, &mt7981_clk_tree,
-					sgmii1_cgs, ARRAY_SIZE(sgmii1_cgs), 0);
+					data->gates, data->num_gates,
+					data->gates[0].id);
 }
 
-static const struct udevice_id mt7981_sgmii1sys_compat[] = {
-	{ .compatible = "mediatek,mt7981-sgmiisys_1", },
+MTK_GATE_CLK_DATA(sgmii0_cgs);
+MTK_GATE_CLK_DATA(sgmii1_cgs);
+
+static const struct udevice_id mt7981_clk_gate_compat[] = {
+	{
+		.compatible = "mediatek,mt7981-sgmiisys_0",
+		.data = (ulong)&sgmii0_cgs_data,
+	},
+	{
+		.compatible = "mediatek,mt7981-sgmiisys_1",
+		.data = (ulong)&sgmii1_cgs_data,
+	},
 	{}
 };
 
-U_BOOT_DRIVER(mt7981_clk_sgmii1sys) = {
-	.name = "mt7981-clock-sgmii1sys",
+U_BOOT_DRIVER(mt7981_clk_gate) = {
+	.name = "mt7981-gate-clk",
 	.id = UCLASS_CLK,
-	.of_match = mt7981_sgmii1sys_compat,
-	.probe = mt7981_sgmii1sys_probe,
+	.of_match = mt7981_clk_gate_compat,
+	.probe = mt7981_clk_gate_probe,
 	.priv_auto = sizeof(struct mtk_cg_priv),
 	.ops = &mtk_clk_gate_ops,
 };
@@ -819,12 +814,6 @@ static const struct mtk_gate eth_cgs[] = {
 	GATE_ETH(CLK_ETH_WOCPU0_EN, "eth_wocpu0_en", CLK_TOP_NETSYS_WED_MCU, 15),
 };
 
-static int mt7981_ethsys_probe(struct udevice *dev)
-{
-	return mtk_common_clk_gate_init(dev, &mt7981_clk_tree,
-					eth_cgs, ARRAY_SIZE(eth_cgs), 0);
-}
-
 static int mt7981_ethsys_bind(struct udevice *dev)
 {
 	int ret = 0;
@@ -838,8 +827,13 @@ static int mt7981_ethsys_bind(struct udevice *dev)
 	return ret;
 }
 
+MTK_GATE_CLK_DATA(eth_cgs);
+
 static const struct udevice_id mt7981_ethsys_compat[] = {
-	{ .compatible = "mediatek,mt7981-ethsys", },
+	{
+		.compatible = "mediatek,mt7981-ethsys",
+		.data = (ulong)&eth_cgs_data,
+	},
 	{}
 };
 
@@ -847,7 +841,7 @@ U_BOOT_DRIVER(mt7981_clk_ethsys) = {
 	.name = "mt7981-clock-ethsys",
 	.id = UCLASS_CLK,
 	.of_match = mt7981_ethsys_compat,
-	.probe = mt7981_ethsys_probe,
+	.probe = mt7981_clk_gate_probe,
 	.bind = mt7981_ethsys_bind,
 	.priv_auto = sizeof(struct mtk_cg_priv),
 	.ops = &mtk_clk_gate_ops,

-- 
2.54.0